Commit Graph

450 Commits

Author SHA1 Message Date
twinaphex 6f2d0bbee8 Add od-beta 2021-03-25 21:21:21 +01:00
Autechre e5c685583e
Merge pull request #118 from davidgfnet/master 2021-03-23 20:13:44 +01:00
David Guillen Fandos ff510e7f7a Move caches to stub files to get around gcc 10
Seems that using the __atribute__ magic for sections is not the best way
of doing this, since it injects some default atributtes that collide
with the user defined ones. Using assembly is far easier in this case.

Reworked definitions a bit to make it easier to import from assembly.
Also wrapped stuff around macros for easy and less verbose
implementation of the symbol prefix issue.
2021-03-23 20:02:44 +01:00
Autechre f31fa6a57b
Merge pull request #117 from davidgfnet/asmfixes2
Make ewram memory linear
2021-03-23 19:43:20 +01:00
David Guillen Fandos 11ec213c99 Make ewram memory lineal
This saves a few cycles in MIPS and simplifies a bit the core.
Removed the write map, only affects interpreter performance very
minimally. Rewired ARM and x86 handlers to support direct access to
I/EWRAM (and VRAM on ARM) to compensate. Overall performance is slightly
better but code is cleaner and allows for further improvements in the
dynarecs.
2021-03-23 19:09:56 +01:00
Autechre 7e27010a3c
Merge pull request #116 from davidgfnet/master
Export double symbol to cover Win but also Apple compilers
2021-03-23 01:00:27 +01:00
David Guillen Fandos 55eaee631d Export double symbol to cover Win but also Apple compilers 2021-03-23 00:50:34 +01:00
Autechre 128ad07777
Merge pull request #115 from davidgfnet/master
Fix Windows compilers symbol names
2021-03-22 23:27:36 +01:00
David Guillen Fandos 8c18c8c421 Fix Windows compilers symbol names 2021-03-22 23:17:24 +01:00
Autechre f3ce8bbd0c
Merge pull request #114 from davidgfnet/master
Adding Normmatt's BIOS as a built-in BIOS
2021-03-22 22:18:13 +01:00
David Guillen Fandos f6f3a91039 Adding Normmatt's BIOS as a built-in BIOS
Add options to select whether to boot from BIOS (default is no, as it is
now) and whether to use the original bios or the builtin one (default is
auto, which tries to use the official but falls back to the builtin if
not found).
2021-03-22 21:45:52 +01:00
Autechre 5ef784ab8a
Merge pull request #112 from davidgfnet/master
Enable runtime dynarec enable/disable
2021-03-18 03:15:03 +01:00
Autechre 11632ad5e3
Merge pull request #113 from davidgfnet/asmfixes2
asm fixes for clang
2021-03-18 03:14:55 +01:00
David Guillen Fandos 9de4220376 asm fixes for clang 2021-03-18 01:20:14 +01:00
David Guillen Fandos eab44b9e0b Enable runtime dynarec enable/disable
Added a more thorough cache cleanup for reset/mode-change too.
Fixed the mmap initialization that ends up leaking memory.
Minor x86 asm fixes for Android.
2021-03-17 21:05:49 +01:00
Autechre 3dfdaaa8d9
Merge pull request #111 from davidgfnet/master
Remove BIOS reserved translation area
2021-03-17 19:09:12 +01:00
David Guillen Fandos fb7ca09b01 Remove BIOS reserved translation area
This is not really necessary since it can share area with ROM.
Performance impact should be very minimal (haven't noticed it myself)
and could be compensated (even by a positive offset) if we bump the ROM
cache area size.
Tested with several dynarecs.
2021-03-17 18:33:02 +01:00
Autechre 85ba903b19
Merge pull request #110 from davidgfnet/master
Rewrite the MIPS stub backend to add OpenDingux
2021-03-17 07:20:55 +01:00
David Guillen Fandos 34e672ed25 Simplify open load handling for MIPS and fix other arches
Also rewrite a bit memory handlers for smaller functions.
2021-03-16 22:58:58 +01:00
David Guillen Fandos 6b503667ec Add Dingux support
Uses a different cache primitive and a differend madd(u) encoding.
Also added a flag for BGR vs RGB color output (since PSP is assuming to
be BGR for speed).
Aside from that the ABI required some special function calls for PIC.
2021-03-16 22:58:58 +01:00
David Guillen Fandos 80be1e3447 Remove old handlers from mips/stub 2021-03-16 22:58:58 +01:00
David Guillen Fandos 5ffd2832e8 Rewrite of the MIPS dynarec stubs
This allows us to emit the handlers directly in a more efficient manner.
At the same time it allows for an easy fix to emit PIC code, which is
necessary for libretro. This also enables more platform specific
optimizations and variations, perhaps even run-time multiplatform
support.
2021-03-16 22:58:58 +01:00
Autechre b9ac453675
Merge pull request #109 from jdgleaver/post-process-fix
Ensure post processing configuration is correctly reset in retro_deinit()
2021-03-16 14:24:29 +01:00
jdgleaver 3db8eba7fd Ensure post processing configuration is correctly reset in retro_deinit() 2021-03-16 13:14:21 +00:00
Autechre 9551d76484
Merge pull request #108 from davidgfnet/master
Move a few more registers to context
2021-03-16 02:09:41 +01:00
David Guillen Fandos 46cad2958a Move a few more registers to context
This gets rid of some more absolute addrs in the MIPS dynarec.
Tested on several platforms, we should be good.
2021-03-16 01:02:10 +01:00
Autechre bfc7cc7fdf
Merge pull request #107 from davidgfnet/master
Move palettes around to simplify MIPS dynarec
2021-03-15 02:33:30 +01:00
David Guillen Fandos c86b9064df Move palettes around to simplify MIPS dynarec
Will move also OAM structures to gain a few cycles per load/store.
Loads can also be optimized for an extra instruction per access.
2021-03-15 02:25:02 +01:00
Autechre 6e9104e1ee
Merge pull request #105 from davidgfnet/master
Fix typo
2021-03-12 23:19:10 +01:00
David Guillen Fandos 1f63b39523 Fix typo 2021-03-12 23:15:03 +01:00
Autechre 8d60fb2507
Merge pull request #104 from davidgfnet/master
Improve and simplify dynarec JIT area.
2021-03-12 22:36:33 +01:00
David Guillen Fandos 1e8097ac79 Improve and simplify dynarec JIT area.
Also fix a regression on VITA.
Use gcc/OS cache flushing routines for MIPS32 instead of synci
2021-03-12 18:05:48 +01:00
Autechre e178b25425
Merge pull request #103 from davidgfnet/cachestuff
Improve cache flush magic
2021-03-12 05:35:17 +01:00
Autechre 7d25898439
Merge pull request #102 from davidgfnet/master
Remove PSP-specific stuff from MIPS backend
2021-03-12 01:52:53 +01:00
David Guillen Fandos 462f0e9784 Improve cache flush magic
Make it better and more generic. Add support for MIPS32 and fix the
messy PSP code.
2021-03-12 01:46:09 +01:00
David Guillen Fandos 7db08a3fcf Fix fd check 2021-03-11 22:13:32 +01:00
David Guillen Fandos 5127f4b5cc Remove PSP-specific stuff from MIPS backend
This is unnecessary since newlib supports all file I/O.
This is needed for other mips ports
2021-03-10 18:41:37 +01:00
twinaphex bd36c9c77d Add osx-arm64 target 2021-03-09 22:05:36 +01:00
Autechre 45c8ef0a0b
Merge pull request #101 from davidgfnet/master
Remove libco
2021-03-09 20:31:50 +01:00
David Guillen Fandos 0522d9a4f5 Add workaround for Android ARM builds
While we are at it, use ARM mode for better performance.
2021-03-09 19:29:18 +01:00
twinaphex 6a8aa84200 Add ios-arm64/tvos-arm64 2021-03-09 04:45:35 +01:00
David Guillen Fandos 56dc6ecb70 Remove libco
This removes libco and all the usages of it (+pthreads).
Rewired all dynarecs and interpreter to return after every frame so that
libretro can process events. This required to make dynarec re-entrant.

Dynarecs were updated to check for new frame on every update (IRQ, cycle
exhaustion, I/O write, etc). The performance impact of doing so should
be minimal (and definitely outweight the libco gains). While at it,
fixed small issues to get a bit more perf: arm dynarec was not idling
correctly, mips was using stack when not needed, etc.

Tested on PSP (mips), OGA (armv7), Linux (x86 and interpreter). Not
tested on Android though.
2021-03-08 18:44:03 +01:00
Autechre d1b8c2d92b
Merge pull request #100 from davidgfnet/master
Fix a ghost bug with some games
2021-03-08 03:02:50 +01:00
David Guillen Fandos 02e35339ee Fix a ghost bug with some games
Affects at least SM Adv 4 on PSP, which doesn't load at all.
I think the MIPS pipeline does not like invalidating the Icache and
using it immediately after (seems to read an old value sometimes?).
Rewired it to not do that and instead jump to the handler directly.
2021-03-08 02:59:11 +01:00
Autechre 7fcd1e5e30
Merge pull request #99 from davidgfnet/master
Fix x86 dynarec, broken by d10c4afe
2021-03-06 21:23:42 +01:00
David Guillen Fandos 3d558413fd Fix x86 dynarec, broken by d10c4afe
The dynarec expects function args to be located in registers instead of
the stack, which is not the default calling convetion in GCC/clang.
2021-03-06 21:15:22 +01:00
Autechre cbcb5df7da
Merge pull request #98 from davidgfnet/master
ARM dynarec: Do not use the stack at all
2021-03-05 18:27:13 +01:00
David Guillen Fandos d21478e06e ARM dynarec: Do not use the stack at all
Fix a C func call while at it. This is a prerequisite to make the
dynarec re-entrant and get rid of libco
2021-03-05 17:47:20 +01:00
Autechre fa45d3701a
Merge pull request #97 from davidgfnet/master
Minor ARM cleanup
2021-03-05 04:54:57 +01:00
David Guillen Fandos 7bebd3051c Remove dead code
Turns out this was not even used! No need to fix it then!
2021-03-05 01:15:55 +01:00