Commit Graph

59 Commits

Author SHA1 Message Date
David Guillen Fandos ea2608812f Minor optimization 2021-05-19 20:11:35 +02:00
David Guillen Fandos aafde6de7b Add ROM mirroring and fix mult. cycle count
This should correct some minor issues in some games.
2021-05-17 01:16:56 +02:00
David Guillen Fandos 2877886ff1 Fix ARM dynarec unaligned 32 bit loads
This might make a handful games slightly slower (but on the upper side
they work now instead of crashing or restarting).
Also while at it, fix some minor stuff in arm stubs for speed.
2021-05-17 01:16:56 +02:00
David Guillen Fandos 37430f22c5 Small optimization (~2-4%) and whitespace cleanup!
Cleans up a ton of whitespace in cpu.c (like 100KB!) and improves
readability of some massive decode statements.

Added an optimization for PC-relative loads (pool load) in ROM (since
it's read only and cannot possibily change) that directly emits an
immediate load. This is way faster, specially in MIPS/x86, ARM can be
even faster if we rewrite the immediate load macros to also use a pool.
2021-05-07 20:41:54 +02:00
David Guillen Fandos 883f07f487 Fix small buf and add cheat error messages
Some minor formating too
2021-05-05 21:15:27 +02:00
David Guillen Fandos 4fd456e158 Adding Code Breaker cheat support
This works on both interpreter and dynarec.
Tested in MIPS, ARM and x86, still needs some more testing, some edge
cases can be buggy.
2021-05-05 21:15:27 +02:00
David Guillen Fandos d83f8fbd25 Fix Vita port and likely some Linux/Android hidden issues
Using an invalid SP makes Vita crash (for an unkown reason) and makes
things like C signal handlers crash (luckily Retroarch doesn't use
them). It is also a violation of the ABI and not a great idea.
Recycled some little used registers to free SP. Perf should be roughly
the same.
2021-04-27 18:39:46 +02:00
David Guillen Fandos 5b5a4db6c2 Add instruction tracing, for testing purposes 2021-04-03 00:37:42 +02:00
David Guillen Fandos 8c14ac9619 Add function decorators for easier debugging / profiling 2021-04-02 02:10:00 +02:00
David Guillen Fandos 71ebc49b59 Improve indirect jumps in ARM
Handle already translated blocks in the ARM asm to speed up indirect
branches (affect some games more than others)
2021-03-30 21:06:52 +02:00
David Guillen Fandos 336b14a876 Improve ARM store handlers 2021-03-30 01:21:48 +02:00
David Guillen Fandos 452ba76ba8 Fix 16 bit RAM stores (VRAM and OAM) in ARM 2021-03-26 23:13:26 +01:00
David Guillen Fandos d284c868e9 Improve ARM store accesses 2021-03-26 23:13:26 +01:00
David Guillen Fandos 7ea6c5e247 Move OAM RAM to stubs also
Makes accesses more efficient for MIPS. Make accesses also fast for palette
reads.
2021-03-26 23:13:26 +01:00
David Guillen Fandos a494a3f00e Move OAM update flag to a register
Fix a small bug in MIPS dynarec that affects non -G0 targets
2021-03-26 23:13:26 +01:00
David Guillen Fandos ff510e7f7a Move caches to stub files to get around gcc 10
Seems that using the __atribute__ magic for sections is not the best way
of doing this, since it injects some default atributtes that collide
with the user defined ones. Using assembly is far easier in this case.

Reworked definitions a bit to make it easier to import from assembly.
Also wrapped stuff around macros for easy and less verbose
implementation of the symbol prefix issue.
2021-03-23 20:02:44 +01:00
David Guillen Fandos 11ec213c99 Make ewram memory lineal
This saves a few cycles in MIPS and simplifies a bit the core.
Removed the write map, only affects interpreter performance very
minimally. Rewired ARM and x86 handlers to support direct access to
I/EWRAM (and VRAM on ARM) to compensate. Overall performance is slightly
better but code is cleaner and allows for further improvements in the
dynarecs.
2021-03-23 19:09:56 +01:00
David Guillen Fandos 9de4220376 asm fixes for clang 2021-03-18 01:20:14 +01:00
David Guillen Fandos fb7ca09b01 Remove BIOS reserved translation area
This is not really necessary since it can share area with ROM.
Performance impact should be very minimal (haven't noticed it myself)
and could be compensated (even by a positive offset) if we bump the ROM
cache area size.
Tested with several dynarecs.
2021-03-17 18:33:02 +01:00
David Guillen Fandos 34e672ed25 Simplify open load handling for MIPS and fix other arches
Also rewrite a bit memory handlers for smaller functions.
2021-03-16 22:58:58 +01:00
David Guillen Fandos 46cad2958a Move a few more registers to context
This gets rid of some more absolute addrs in the MIPS dynarec.
Tested on several platforms, we should be good.
2021-03-16 01:02:10 +01:00
David Guillen Fandos c86b9064df Move palettes around to simplify MIPS dynarec
Will move also OAM structures to gain a few cycles per load/store.
Loads can also be optimized for an extra instruction per access.
2021-03-15 02:25:02 +01:00
David Guillen Fandos 56dc6ecb70 Remove libco
This removes libco and all the usages of it (+pthreads).
Rewired all dynarecs and interpreter to return after every frame so that
libretro can process events. This required to make dynarec re-entrant.

Dynarecs were updated to check for new frame on every update (IRQ, cycle
exhaustion, I/O write, etc). The performance impact of doing so should
be minimal (and definitely outweight the libco gains). While at it,
fixed small issues to get a bit more perf: arm dynarec was not idling
correctly, mips was using stack when not needed, etc.

Tested on PSP (mips), OGA (armv7), Linux (x86 and interpreter). Not
tested on Android though.
2021-03-08 18:44:03 +01:00
David Guillen Fandos d21478e06e ARM dynarec: Do not use the stack at all
Fix a C func call while at it. This is a prerequisite to make the
dynarec re-entrant and get rid of libco
2021-03-05 17:47:20 +01:00
David Guillen Fandos 7bebd3051c Remove dead code
Turns out this was not even used! No need to fix it then!
2021-03-05 01:15:55 +01:00
David Guillen Fandos 6770e0a5e7 Minor improvements in ARM stubs
This gets rid of stack usage (except for callback invocations) in the
dynarec execution code. A requirement to make the dynarec re-entrant.
2021-03-04 18:35:48 +01:00
David Guillen Fandos 8d52e613c7 Minor cleanup in ARM and MIPS
Fix some small issues, mainly associated with undefined behaviour
expressions
2021-02-12 21:47:35 +01:00
David Guillen Fandos 2c6026cfe5 Move r15 to reg_a0 (instead of reg_mem)
I think this does not make a difference at all in the code, since PC is
treated in a special way anyway (reloaded with an immediate when read
and treated as an indirect branch when written). However for the sake of
completeness I'm undoing what I did. (The comma fix stays :P)
2021-02-10 02:53:26 +01:00
David Guillen Fandos 7aaa280b9f Fix ARM dynarec
Turns out there were a couple of very interesting and hard to track
bugs. A missing comma made the reg list too short, leaving the 31th
element at the mercy of the linker ordering algorithm, which seems to
work in some cases depending on the compiler version.
Also the cache flush code seemed not to work on my machine (OGA),
not sure why it wored in the past :/
2021-02-10 02:46:45 +01:00
twinaphex 679006a296 Add more forward declarations 2020-10-08 15:51:24 +02:00
twinaphex 4181385f39 Add forward declarations 2020-10-08 15:47:37 +02:00
Francisco José García García 6bfb7e1b47 (VITA) Dynarec working 2016-10-03 20:19:11 +02:00
Francisco José García García 44b63e7d28 (VITA) Dynarec WIP 2016-08-14 18:28:25 +02:00
Francisco José García García 6ab0992ecf (VITA) Dynarec WIP 2016-08-08 00:31:21 +02:00
twinaphex dd86f4df9a Add MSB_FIRST ifdefs 2015-07-30 03:01:40 +02:00
Twinaphex d10c4afea2 Get rid of function_cc 2014-12-20 09:14:38 +01:00
twinaphex 9ed950fd4e arm/video_blend.S - add another __MACH__ hack 2014-12-11 19:05:18 +01:00
twinaphex 8d7b204c2b (ARM ASM) Add __MACH__ hack to get iOS port linking for now 2014-12-11 19:03:08 +01:00
twinaphex 5b59ef3acc Reimplement cache invalidation code 2014-12-11 18:47:48 +01:00
twinaphex 97166d5cbd Remove warm, keep only fallback cache invalidation routine.
Not available on iOS/Android, only probably there on OpenPandora.
On top of that iOS 8+ deprecated the system() call, so would
probably be becoming obsolete on that platform.
2014-12-11 16:58:34 +01:00
twinaphex d6c3c8dee6 (iOS) Compatibility patches pt. 1 2014-12-11 16:36:30 +01:00
twinaphex 89feda2e3e (ARM ASM) Use .globl instead of .global 2014-12-11 04:57:55 +01:00
twinaphex 7e7383531b warm.h - change linux/ioctl.h include into sys/ioctl.h include 2014-12-10 18:28:46 +01:00
twinaphex 512f7f5b27 Code nits - get rid of '== NULL' / '!= NULL' 2014-12-10 16:40:43 +01:00
aliaspider a926a68eb3 cleanups 2014-12-10 12:53:26 +01:00
twinaphex fe19474dca Add macro parameter 'opcode' to some macros 2014-12-10 01:17:37 +01:00
aliaspider 9f97113292 fix compiler error: initializer element is not a compile-time constant 2014-12-10 00:20:41 +01:00
twinaphex a8ff99c68b Take out NEON CPU filters 2014-07-14 04:59:32 +02:00
twinaphex 30b95e686b Take out GIZMONDO/POCKETPC ifdefs 2014-07-14 04:57:32 +02:00
notaz e38fee1b96 integrate M-HT's neon scalers 2012-10-02 01:06:32 +03:00