Add ROM mirroring and fix mult. cycle count
This should correct some minor issues in some games.
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2877886ff1
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aafde6de7b
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@ -1239,12 +1239,10 @@ u32 execute_store_cpsr_body(u32 _cpsr, u32 store_mask, u32 address)
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#define emit_trace_instruction(pc) \
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generate_save_flags(); \
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ARM_LDR_IMM(0, ARMREG_SP, reg_base, 34*4); \
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ARM_STMDB_WB(0, ARMREG_SP, 0x500C); \
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arm_load_imm_32bit(reg_a0, pc); \
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generate_function_call(trace_instruction); \
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ARM_LDMIA_WB(0, ARMREG_SP, 0x500C); \
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arm_load_imm_32bit(ARMREG_SP, (u32)reg); \
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generate_restore_flags();
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#define emit_trace_thumb_instruction(pc) \
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emit_trace_instruction(pc)
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@ -297,6 +297,7 @@ void translate_icache_sync() {
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{ \
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/* MUL rd, rm, rs */ \
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arm_multiply(no, no); \
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cycle_count += 2; /* variable 1..4, pick 2 as an aprox. */ \
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} \
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} \
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else \
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@ -314,6 +315,7 @@ void translate_icache_sync() {
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case 0: \
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/* MULS rd, rm, rs */ \
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arm_multiply(no, yes); \
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cycle_count += 2; /* variable 1..4, pick 2 as an aprox. */ \
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break; \
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\
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case 1: \
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@ -351,6 +353,7 @@ void translate_icache_sync() {
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{ \
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/* MLA rd, rm, rs, rn */ \
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arm_multiply(yes, no); \
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cycle_count += 3; /* variable 2..5, pick 3 as an aprox. */ \
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} \
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} \
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else \
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@ -368,6 +371,7 @@ void translate_icache_sync() {
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case 0: \
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/* MLAS rd, rm, rs, rn */ \
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arm_multiply(yes, yes); \
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cycle_count += 3; /* variable 2..5, pick 3 as an aprox. */ \
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break; \
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\
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case 1: \
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@ -487,6 +491,7 @@ void translate_icache_sync() {
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{ \
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/* UMULL rd, rm, rs */ \
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arm_multiply_long(u64, no, no); \
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cycle_count += 3; /* this is an aproximation :P */ \
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} \
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} \
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else \
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@ -504,6 +509,7 @@ void translate_icache_sync() {
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case 0: \
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/* UMULLS rdlo, rdhi, rm, rs */ \
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arm_multiply_long(u64, no, yes); \
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cycle_count += 3; /* this is an aproximation :P */ \
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break; \
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\
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case 1: \
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@ -541,6 +547,7 @@ void translate_icache_sync() {
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{ \
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/* UMLAL rd, rm, rs */ \
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arm_multiply_long(u64_add, yes, no); \
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cycle_count += 3; /* Between 2 and 5 cycles? */ \
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} \
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} \
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else \
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@ -558,6 +565,7 @@ void translate_icache_sync() {
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case 0: \
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/* UMLALS rdlo, rdhi, rm, rs */ \
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arm_multiply_long(u64_add, yes, yes); \
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cycle_count += 3; /* Between 2 and 5 cycles? */ \
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break; \
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\
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case 1: \
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@ -595,6 +603,7 @@ void translate_icache_sync() {
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{ \
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/* SMULL rd, rm, rs */ \
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arm_multiply_long(s64, no, no); \
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cycle_count += 2; /* Between 1 and 4 cycles? */ \
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} \
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} \
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else \
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@ -612,6 +621,7 @@ void translate_icache_sync() {
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case 0: \
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/* SMULLS rdlo, rdhi, rm, rs */ \
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arm_multiply_long(s64, no, yes); \
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cycle_count += 2; /* Between 1 and 4 cycles? */ \
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break; \
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\
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case 1: \
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@ -649,6 +659,7 @@ void translate_icache_sync() {
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{ \
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/* SMLAL rd, rm, rs */ \
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arm_multiply_long(s64_add, yes, no); \
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cycle_count += 3; /* Between 2 and 5 cycles? */ \
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} \
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} \
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else \
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@ -666,6 +677,7 @@ void translate_icache_sync() {
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case 0: \
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/* SMLALS rdlo, rdhi, rm, rs */ \
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arm_multiply_long(s64_add, yes, yes); \
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cycle_count += 3; /* Between 2 and 5 cycles? */ \
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break; \
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\
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case 1: \
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@ -1870,6 +1882,7 @@ void translate_icache_sync() {
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case 0x01: \
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/* MUL rd, rs */ \
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thumb_data_proc(alu_op, muls, reg, rd, rd, rs); \
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cycle_count += 2; /* Between 1 and 4 extra cycles */ \
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break; \
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\
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case 0x02: \
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12
gba_memory.c
12
gba_memory.c
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@ -3155,12 +3155,12 @@ static void init_memory_gamepak(void)
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}
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else
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{
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map_region(read, 0x8000000, 0x8000000 + gamepak_size, 1024, gamepak_rom);
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map_null(read, 0x8000000 + gamepak_size, 0xA000000);
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map_region(read, 0xA000000, 0xA000000 + gamepak_size, 1024, gamepak_rom);
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map_null(read, 0xA000000 + gamepak_size, 0xC000000);
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map_region(read, 0xC000000, 0xC000000 + gamepak_size, 1024, gamepak_rom);
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map_null(read, 0xC000000 + gamepak_size, 0xE000000);
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/* Map the ROM using mirroring, not many games use it */
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unsigned numblocks = gamepak_size >> 15;
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map_region(read, 0x8000000, 0xA000000, numblocks, gamepak_rom);
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map_region(read, 0xA000000, 0xC000000, numblocks, gamepak_rom);
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map_region(read, 0xC000000, 0xD000000, numblocks, gamepak_rom);
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/* Do not map D-E regions since they are also used for FLASH */
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}
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}
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