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Get rid of function_cc

This commit is contained in:
Twinaphex 2014-12-20 09:14:38 +01:00
parent ba834beeb1
commit d10c4afea2
7 changed files with 96 additions and 115 deletions
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4
arm/arm_emit.h
View File

@ -43,7 +43,7 @@ u32 execute_spsr_restore(u32 address);
void execute_swi_arm(u32 pc);
void execute_swi_thumb(u32 pc);
void function_cc execute_store_u32_safe(u32 address, u32 source);
void execute_store_u32_safe(u32 address, u32 source);
#define write32(value) \
*((u32 *)translation_ptr) = value; \
@ -671,7 +671,7 @@ u32 arm_disect_imm_32bit(u32 imm, u32 *stores, u32 *rotations)
} \
u32 function_cc execute_spsr_restore_body(u32 pc)
u32 execute_spsr_restore_body(u32 pc)
{
set_cpu_mode(cpu_modes[reg[REG_CPSR] & 0x1F]);
check_for_interrupts();

8
common.h
View File

@ -60,8 +60,6 @@
#include <pspaudiolib.h>
#include <psprtc.h>
#define function_cc
#define convert_palette(value) \
value = ((value & 0x7FE0) << 1) | (value & 0x1F) \
@ -98,12 +96,6 @@
void switch_to_main_thread(void);
#ifdef ARM_ARCH
#define function_cc
#else
#define function_cc __attribute__((regparm(2)))
#endif
typedef unsigned char u8;
typedef signed char s8;
typedef unsigned short int u16;

34
cpu.h
View File

@ -99,21 +99,21 @@ void execute_arm(u32 cycles);
void raise_interrupt(irq_type irq_raised);
void set_cpu_mode(cpu_mode_type new_mode);
u32 function_cc execute_load_u8(u32 address);
u32 function_cc execute_load_u16(u32 address);
u32 function_cc execute_load_u32(u32 address);
u32 function_cc execute_load_s8(u32 address);
u32 function_cc execute_load_s16(u32 address);
void function_cc execute_store_u8(u32 address, u32 source);
void function_cc execute_store_u16(u32 address, u32 source);
void function_cc execute_store_u32(u32 address, u32 source);
u32 function_cc execute_arm_translate(u32 cycles);
void init_translater();
u32 execute_load_u8(u32 address);
u32 execute_load_u16(u32 address);
u32 execute_load_u32(u32 address);
u32 execute_load_s8(u32 address);
u32 execute_load_s16(u32 address);
void execute_store_u8(u32 address, u32 source);
void execute_store_u16(u32 address, u32 source);
void execute_store_u32(u32 address, u32 source);
u32 execute_arm_translate(u32 cycles);
void init_translater(void);
void cpu_write_savestate(void);
void cpu_read_savestate(void);
u8 function_cc *block_lookup_address_arm(u32 pc);
u8 function_cc *block_lookup_address_thumb(u32 pc);
u8 *block_lookup_address_arm(u32 pc);
u8 *block_lookup_address_thumb(u32 pc);
s32 translate_block_arm(u32 pc, translation_region_type translation_region,
u32 smc_enable);
s32 translate_block_thumb(u32 pc, translation_region_type translation_region,
@ -167,10 +167,10 @@ extern u32 in_interrupt;
/* EDIT: Shouldn't this be extern ?! */
extern u32 *rom_branch_hash[ROM_BRANCH_HASH_SIZE];
void flush_translation_cache_rom();
void flush_translation_cache_ram();
void flush_translation_cache_bios();
void dump_translation_cache();
void flush_translation_cache_rom(void);
void flush_translation_cache_ram(void);
void flush_translation_cache_bios(void);
void dump_translation_cache(void);
extern u32 reg_mode[7][7];
extern u32 spsr[6];
@ -195,7 +195,7 @@ extern u32 memory_writes_u8;
extern u32 memory_writes_u16;
extern u32 memory_writes_u32;
void init_cpu();
void init_cpu(void);
void move_reg();
#endif

2
cpu_threaded.c
View File

@ -2799,7 +2799,7 @@ u32 translation_flush_count = 0;
#define block_lookup_address_builder(type) \
u8 function_cc *block_lookup_address_##type(u32 pc) \
u8 *block_lookup_address_##type(u32 pc) \
{ \
u16 *location; \
u32 block_tag; \

57
gba_memory.c
View File

@ -418,26 +418,18 @@ u8 read_backup(u32 address)
backup_type = BACKUP_SRAM;
if(backup_type == BACKUP_SRAM)
{
value = gamepak_backup[address];
}
else
if(flash_mode == FLASH_ID_MODE)
else if(flash_mode == FLASH_ID_MODE)
{
/* ID manufacturer type */
if(address == 0x0000)
value = flash_manufacturer_id;
else
/* ID device type */
if(address == 0x0001)
else if(address == 0x0001)
value = flash_device_id;
}
else
{
value = flash_bank_ptr[address];
}
return value;
}
@ -481,8 +473,7 @@ u32 eeprom_address = 0;
s32 eeprom_counter = 0;
u8 eeprom_buffer[8];
void function_cc write_eeprom(u32 address, u32 value)
void write_eeprom(u32 address, u32 value)
{
switch(eeprom_mode)
{
@ -599,7 +590,7 @@ void function_cc write_eeprom(u32 address, u32 value)
value = current_instruction | (current_instruction << 16); \
} \
u32 function_cc read_eeprom(void)
u32 read_eeprom(void)
{
u32 value;
@ -802,7 +793,7 @@ static cpu_alert_type trigger_dma(u32 dma_number, u32 value)
#define access_register16_low(address) \
value = ((address16(io_registers, address + 2)) << 16) | value \
cpu_alert_type function_cc write_io_register8(u32 address, u32 value)
cpu_alert_type write_io_register8(u32 address, u32 value)
{
switch(address)
{
@ -1218,7 +1209,7 @@ cpu_alert_type function_cc write_io_register8(u32 address, u32 value)
return CPU_ALERT_NONE;
}
cpu_alert_type function_cc write_io_register16(u32 address, u32 value)
cpu_alert_type write_io_register16(u32 address, u32 value)
{
switch(address)
{
@ -1471,7 +1462,7 @@ cpu_alert_type function_cc write_io_register16(u32 address, u32 value)
}
cpu_alert_type function_cc write_io_register32(u32 address, u32 value)
cpu_alert_type write_io_register32(u32 address, u32 value)
{
switch(address)
{
@ -1550,7 +1541,7 @@ cpu_alert_type function_cc write_io_register32(u32 address, u32 value)
} \
void function_cc write_backup(u32 address, u32 value)
void write_backup(u32 address, u32 value)
{
value &= 0xFF;
@ -1741,7 +1732,7 @@ static u32 encode_bcd(u8 value)
\
address16(map, update_address & 0x7FFF) = _value \
void function_cc write_rtc(u32 address, u32 value)
void write_rtc(u32 address, u32 value)
{
u32 rtc_page_index;
u32 update_address;
@ -2015,14 +2006,14 @@ void function_cc write_rtc(u32 address, u32 value)
break; \
} \
u8 function_cc read_memory8(u32 address)
u8 read_memory8(u32 address)
{
u8 value;
read_memory(8);
return value;
}
u16 function_cc read_memory16_signed(u32 address)
u16 read_memory16_signed(u32 address)
{
u16 value;
@ -2036,7 +2027,7 @@ u16 function_cc read_memory16_signed(u32 address)
// unaligned reads are actually 32bit
u32 function_cc read_memory16(u32 address)
u32 read_memory16(u32 address)
{
u32 value;
@ -2055,7 +2046,7 @@ u32 function_cc read_memory16(u32 address)
}
u32 function_cc read_memory32(u32 address)
u32 read_memory32(u32 address)
{
u32 value;
if(address & 0x03)
@ -2073,19 +2064,19 @@ u32 function_cc read_memory32(u32 address)
return value;
}
cpu_alert_type function_cc write_memory8(u32 address, u8 value)
cpu_alert_type write_memory8(u32 address, u8 value)
{
write_memory(8);
return CPU_ALERT_NONE;
}
cpu_alert_type function_cc write_memory16(u32 address, u16 value)
cpu_alert_type write_memory16(u32 address, u16 value)
{
write_memory(16);
return CPU_ALERT_NONE;
}
cpu_alert_type function_cc write_memory32(u32 address, u32 value)
cpu_alert_type write_memory32(u32 address, u32 value)
{
write_memory(32);
return CPU_ALERT_NONE;
@ -2433,17 +2424,15 @@ s32 load_bios(char *name)
{
file_open(bios_file, name, read);
if(file_check_valid(bios_file))
{
file_read(bios_file, bios_rom, 0x4000);
if(!(file_check_valid(bios_file)))
return -1;
// This is a hack to get Zelda working, because emulating
// the proper memory read behavior here is much too expensive.
file_close(bios_file);
return 0;
}
file_read(bios_file, bios_rom, 0x4000);
return -1;
// This is a hack to get Zelda working, because emulating
// the proper memory read behavior here is much too expensive.
file_close(bios_file);
return 0;
}
// DMA memory regions can be one of the following:

14
gba_memory.h
View File

@ -155,13 +155,13 @@ typedef enum
FLASH_MANUFACTURER_SST = 0xBF
} flash_manufacturer_id_type;
u8 function_cc read_memory8(u32 address);
u32 function_cc read_memory16(u32 address);
u16 function_cc read_memory16_signed(u32 address);
u32 function_cc read_memory32(u32 address);
cpu_alert_type function_cc write_memory8(u32 address, u8 value);
cpu_alert_type function_cc write_memory16(u32 address, u16 value);
cpu_alert_type function_cc write_memory32(u32 address, u32 value);
u8 read_memory8(u32 address);
u32 read_memory16(u32 address);
u16 read_memory16_signed(u32 address);
u32 read_memory32(u32 address);
cpu_alert_type write_memory8(u32 address, u8 value);
cpu_alert_type write_memory16(u32 address, u16 value);
cpu_alert_type write_memory32(u32 address, u32 value);
extern u8 *memory_regions[16];
extern u32 memory_limits[16];

92
x86/x86_emit.h
View File

@ -28,7 +28,7 @@ void x86_indirect_branch_arm(u32 address);
void x86_indirect_branch_thumb(u32 address);
void x86_indirect_branch_dual(u32 address);
void function_cc execute_store_cpsr(u32 new_cpsr, u32 store_mask);
void execute_store_cpsr(u32 new_cpsr, u32 store_mask);
typedef enum
{
@ -466,7 +466,7 @@ typedef enum
#define generate_block_prologue() \
#define generate_block_extra_vars_arm() \
void generate_indirect_branch_arm() \
void generate_indirect_branch_arm(void) \
{ \
if(condition == 0x0E) \
{ \
@ -523,7 +523,7 @@ typedef enum
generate_function_call(execute_##name##_##flags_op##_reg); \
generate_mov(ireg, rv) \
u32 function_cc execute_lsl_no_flags_reg(u32 value, u32 shift)
u32 execute_lsl_no_flags_reg(u32 value, u32 shift)
{
if(shift != 0)
{
@ -535,7 +535,7 @@ u32 function_cc execute_lsl_no_flags_reg(u32 value, u32 shift)
return value;
}
u32 function_cc execute_lsr_no_flags_reg(u32 value, u32 shift)
u32 execute_lsr_no_flags_reg(u32 value, u32 shift)
{
if(shift != 0)
{
@ -547,7 +547,7 @@ u32 function_cc execute_lsr_no_flags_reg(u32 value, u32 shift)
return value;
}
u32 function_cc execute_asr_no_flags_reg(u32 value, u32 shift)
u32 execute_asr_no_flags_reg(u32 value, u32 shift)
{
if(shift != 0)
{
@ -559,7 +559,7 @@ u32 function_cc execute_asr_no_flags_reg(u32 value, u32 shift)
return value;
}
u32 function_cc execute_ror_no_flags_reg(u32 value, u32 shift)
u32 execute_ror_no_flags_reg(u32 value, u32 shift)
{
if(shift != 0)
{
@ -570,7 +570,7 @@ u32 function_cc execute_ror_no_flags_reg(u32 value, u32 shift)
}
u32 function_cc execute_lsl_flags_reg(u32 value, u32 shift)
u32 execute_lsl_flags_reg(u32 value, u32 shift)
{
if(shift != 0)
{
@ -592,7 +592,7 @@ u32 function_cc execute_lsl_flags_reg(u32 value, u32 shift)
return value;
}
u32 function_cc execute_lsr_flags_reg(u32 value, u32 shift)
u32 execute_lsr_flags_reg(u32 value, u32 shift)
{
if(shift != 0)
{
@ -614,7 +614,7 @@ u32 function_cc execute_lsr_flags_reg(u32 value, u32 shift)
return value;
}
u32 function_cc execute_asr_flags_reg(u32 value, u32 shift)
u32 execute_asr_flags_reg(u32 value, u32 shift)
{
if(shift != 0)
{
@ -632,7 +632,7 @@ u32 function_cc execute_asr_flags_reg(u32 value, u32 shift)
return value;
}
u32 function_cc execute_ror_flags_reg(u32 value, u32 shift)
u32 execute_ror_flags_reg(u32 value, u32 shift)
{
if(shift != 0)
{
@ -643,14 +643,14 @@ u32 function_cc execute_ror_flags_reg(u32 value, u32 shift)
return value;
}
u32 function_cc execute_rrx_flags(u32 value)
u32 execute_rrx_flags(u32 value)
{
u32 c_flag = reg[REG_C_FLAG];
reg[REG_C_FLAG] = value & 0x01;
return (value >> 1) | (c_flag << 31);
}
u32 function_cc execute_rrx(u32 value)
u32 execute_rrx(u32 value)
{
return (value >> 1) | (reg[REG_C_FLAG] << 31);
}
@ -917,7 +917,7 @@ u32 function_cc execute_rrx(u32 value)
generate_indirect_branch_arm(); \
} \
u32 function_cc execute_spsr_restore(u32 address)
u32 execute_spsr_restore(u32 address)
{
if(reg[CPU_MODE] != MODE_USER)
{
@ -1195,7 +1195,7 @@ typedef enum
generate_store_reg_pc_no_flags(a0, rd); \
} \
static void function_cc execute_mul_flags(u32 dest)
static void execute_mul_flags(u32 dest)
{
calculate_z_flag(dest);
calculate_n_flag(dest);
@ -1223,7 +1223,7 @@ static void function_cc execute_mul_flags(u32 dest)
arm_multiply_flags_##flags(); \
} \
static void function_cc execute_mul_long_flags(u32 dest_lo, u32 dest_hi)
static void execute_mul_long_flags(u32 dest_lo, u32 dest_hi)
{
reg[REG_Z_FLAG] = (dest_lo == 0) & (dest_hi == 0);
calculate_n_flag(dest_hi);
@ -1253,13 +1253,13 @@ static void function_cc execute_mul_long_flags(u32 dest_lo, u32 dest_hi)
arm_multiply_long_flags_##flags(); \
} \
u32 function_cc execute_read_cpsr()
u32 execute_read_cpsr(void)
{
collapse_flags();
return reg[REG_CPSR];
}
u32 function_cc execute_read_spsr()
u32 execute_read_spsr(void)
{
collapse_flags();
return spsr[reg[CPU_MODE]];
@ -1272,7 +1272,7 @@ u32 function_cc execute_read_spsr()
// store_mask and address are stored in the SAVE slots, since there's no real
// register space to nicely pass them.
u32 function_cc execute_store_cpsr_body(u32 _cpsr)
u32 execute_store_cpsr_body(u32 _cpsr)
{
reg[REG_CPSR] = _cpsr;
if(reg[REG_SAVE] & 0xFF)
@ -1293,7 +1293,7 @@ u32 function_cc execute_store_cpsr_body(u32 _cpsr)
}
void function_cc execute_store_spsr(u32 new_spsr, u32 store_mask)
void execute_store_spsr(u32 new_spsr, u32 store_mask)
{
u32 _spsr = spsr[reg[CPU_MODE]];
spsr[reg[CPU_MODE]] = (new_spsr & store_mask) | (_spsr & (~store_mask));
@ -1365,7 +1365,7 @@ void function_cc execute_store_spsr(u32 new_spsr, u32 store_mask)
} \
#define access_memory_generate_read_function(mem_size, mem_type) \
u32 function_cc execute_load_##mem_type(u32 address) \
u32 execute_load_##mem_type(u32 address) \
{ \
u32 dest; \
read_memory(mem_size, mem_type, address, dest); \
@ -1377,7 +1377,7 @@ access_memory_generate_read_function(8, s8);
access_memory_generate_read_function(16, u16);
access_memory_generate_read_function(32, u32);
u32 function_cc execute_load_s16(u32 address)
u32 execute_load_s16(u32 address)
{
u32 dest;
read_memory_s16(address, dest);
@ -1385,7 +1385,7 @@ u32 function_cc execute_load_s16(u32 address)
}
#define access_memory_generate_write_function(mem_size, mem_type) \
void function_cc execute_store_##mem_type(u32 address, u32 source) \
void execute_store_##mem_type(u32 address, u32 source) \
{ \
u8 *map; \
\
@ -1492,7 +1492,7 @@ void function_cc execute_store_##mem_type(u32 address, u32 source) \
#define sprint_yes(access_type, pre_op, post_op, wb) \
printf("sbit on %s %s %s %s\n", #access_type, #pre_op, #post_op, #wb) \
u32 function_cc execute_aligned_load32(u32 address)
u32 execute_aligned_load32(u32 address)
{
u8 *map;
if(!(address & 0xF0000000) && (map = memory_map_read[address >> 15]))
@ -1501,7 +1501,7 @@ u32 function_cc execute_aligned_load32(u32 address)
return read_memory32(address);
}
void function_cc execute_aligned_store32(u32 address, u32 source)
void execute_aligned_store32(u32 address, u32 source)
{
u8 *map;
@ -1729,7 +1729,7 @@ void function_cc execute_aligned_store32(u32 address, u32 source)
// Operation types: lsl, lsr, asr, ror
// Affects N/Z/C flags
u32 function_cc execute_lsl_reg_op(u32 value, u32 shift)
u32 execute_lsl_reg_op(u32 value, u32 shift)
{
if(shift != 0)
{
@ -1753,7 +1753,7 @@ u32 function_cc execute_lsl_reg_op(u32 value, u32 shift)
return value;
}
u32 function_cc execute_lsr_reg_op(u32 value, u32 shift)
u32 execute_lsr_reg_op(u32 value, u32 shift)
{
if(shift != 0)
{
@ -1777,7 +1777,7 @@ u32 function_cc execute_lsr_reg_op(u32 value, u32 shift)
return value;
}
u32 function_cc execute_asr_reg_op(u32 value, u32 shift)
u32 execute_asr_reg_op(u32 value, u32 shift)
{
if(shift != 0)
{
@ -1797,7 +1797,7 @@ u32 function_cc execute_asr_reg_op(u32 value, u32 shift)
return value;
}
u32 function_cc execute_ror_reg_op(u32 value, u32 shift)
u32 execute_ror_reg_op(u32 value, u32 shift)
{
if(shift != 0)
{
@ -1809,7 +1809,7 @@ u32 function_cc execute_ror_reg_op(u32 value, u32 shift)
return value;
}
u32 function_cc execute_lsl_imm_op(u32 value, u32 shift)
u32 execute_lsl_imm_op(u32 value, u32 shift)
{
if(shift != 0)
{
@ -1821,7 +1821,7 @@ u32 function_cc execute_lsl_imm_op(u32 value, u32 shift)
return value;
}
u32 function_cc execute_lsr_imm_op(u32 value, u32 shift)
u32 execute_lsr_imm_op(u32 value, u32 shift)
{
if(shift != 0)
{
@ -1838,7 +1838,7 @@ u32 function_cc execute_lsr_imm_op(u32 value, u32 shift)
return value;
}
u32 function_cc execute_asr_imm_op(u32 value, u32 shift)
u32 execute_asr_imm_op(u32 value, u32 shift)
{
if(shift != 0)
{
@ -1855,7 +1855,7 @@ u32 function_cc execute_asr_imm_op(u32 value, u32 shift)
return value;
}
u32 function_cc execute_ror_imm_op(u32 value, u32 shift)
u32 execute_ror_imm_op(u32 value, u32 shift)
{
if(shift != 0)
{
@ -2057,12 +2057,12 @@ u32 function_cc execute_ror_imm_op(u32 value, u32 shift)
const u32 _sb = src_b \
#define data_proc_generate_logic_function(name, expr) \
u32 function_cc execute_##name(u32 rm, u32 rn) \
u32 execute_##name(u32 rm, u32 rn) \
{ \
return expr; \
} \
\
u32 function_cc execute_##name##s(u32 rm, u32 rn) \
u32 execute_##name##s(u32 rm, u32 rn) \
{ \
u32 dest = expr; \
calculate_z_flag(dest); \
@ -2071,12 +2071,12 @@ u32 function_cc execute_##name##s(u32 rm, u32 rn) \
} \
#define data_proc_generate_logic_unary_function(name, expr) \
u32 function_cc execute_##name(u32 rm) \
u32 execute_##name(u32 rm) \
{ \
return expr; \
} \
\
u32 function_cc execute_##name##s(u32 rm) \
u32 execute_##name##s(u32 rm) \
{ \
u32 dest = expr; \
calculate_z_flag(dest); \
@ -2086,12 +2086,12 @@ u32 function_cc execute_##name##s(u32 rm) \
#define data_proc_generate_sub_function(name, src_a, src_b) \
u32 function_cc execute_##name(u32 rm, u32 rn) \
u32 execute_##name(u32 rm, u32 rn) \
{ \
return (src_a) - (src_b); \
} \
\
u32 function_cc execute_##name##s(u32 rm, u32 rn) \
u32 execute_##name##s(u32 rm, u32 rn) \
{ \
flags_vars(src_a, src_b); \
dest = _sa - _sb; \
@ -2100,12 +2100,12 @@ u32 function_cc execute_##name##s(u32 rm, u32 rn) \
} \
#define data_proc_generate_add_function(name, src_a, src_b) \
u32 function_cc execute_##name(u32 rm, u32 rn) \
u32 execute_##name(u32 rm, u32 rn) \
{ \
return (src_a) + (src_b); \
} \
\
u32 function_cc execute_##name##s(u32 rm, u32 rn) \
u32 execute_##name##s(u32 rm, u32 rn) \
{ \
flags_vars(src_a, src_b); \
dest = _sa + _sb; \
@ -2114,7 +2114,7 @@ u32 function_cc execute_##name##s(u32 rm, u32 rn) \
} \
#define data_proc_generate_sub_test_function(name, src_a, src_b) \
void function_cc execute_##name(u32 rm, u32 rn) \
void execute_##name(u32 rm, u32 rn) \
{ \
flags_vars(src_a, src_b); \
dest = _sa - _sb; \
@ -2122,7 +2122,7 @@ void function_cc execute_##name(u32 rm, u32 rn) \
} \
#define data_proc_generate_add_test_function(name, src_a, src_b) \
void function_cc execute_##name(u32 rm, u32 rn) \
void execute_##name(u32 rm, u32 rn) \
{ \
flags_vars(src_a, src_b); \
dest = _sa + _sb; \
@ -2130,14 +2130,14 @@ void function_cc execute_##name(u32 rm, u32 rn) \
} \
#define data_proc_generate_logic_test_function(name, expr) \
void function_cc execute_##name(u32 rm, u32 rn) \
void execute_##name(u32 rm, u32 rn) \
{ \
u32 dest = expr; \
calculate_z_flag(dest); \
calculate_n_flag(dest); \
} \
u32 function_cc execute_neg(u32 rm) \
u32 execute_neg(u32 rm) \
{ \
u32 dest = 0 - rm; \
calculate_flags_sub(dest, 0, rm); \
@ -2166,7 +2166,7 @@ data_proc_generate_logic_test_function(teq, rn ^ rm);
data_proc_generate_sub_test_function(cmp, rn, rm);
data_proc_generate_add_test_function(cmn, rn, rm);
static void function_cc execute_swi(u32 pc)
static void execute_swi(u32 pc)
{
reg_mode[MODE_SUPERVISOR][6] = pc;
collapse_flags();
@ -2289,7 +2289,7 @@ u8 swi_hle_handle[256] =
0x0 // SWI 2A: SoundGetJumpList
};
void function_cc swi_hle_div()
void swi_hle_div(void)
{
s32 result = (s32)reg[0] / (s32)reg[1];
reg[1] = (s32)reg[0] % (s32)reg[1];