Commit Graph

479 Commits

Author SHA1 Message Date
David Guillen Fandos 261b2db9bb Cleanup Makefiles a bit 2021-05-19 20:11:35 +02:00
David Guillen Fandos ea2608812f Minor optimization 2021-05-19 20:11:35 +02:00
Autechre 96b3ed46eb
Merge pull request #130 from jdgleaver/turbo-buttons
Add turbo A/B buttons
2021-05-17 16:12:37 +02:00
jdgleaver d0b35e939c Add turbo A/B buttons 2021-05-17 13:02:41 +01:00
David Guillen Fandos aafde6de7b Add ROM mirroring and fix mult. cycle count
This should correct some minor issues in some games.
2021-05-17 01:16:56 +02:00
David Guillen Fandos 2877886ff1 Fix ARM dynarec unaligned 32 bit loads
This might make a handful games slightly slower (but on the upper side
they work now instead of crashing or restarting).
Also while at it, fix some minor stuff in arm stubs for speed.
2021-05-17 01:16:56 +02:00
Autechre cc1a074621
Merge pull request #86 from jdgleaver/ff-button
Add dedicated RetroPad fast-forward button
2021-05-13 17:16:23 +02:00
jdgleaver 134aba2b37 Add dedicated RetroPad fast-forward button 2021-05-13 16:03:55 +01:00
David Guillen Fandos 37430f22c5 Small optimization (~2-4%) and whitespace cleanup!
Cleans up a ton of whitespace in cpu.c (like 100KB!) and improves
readability of some massive decode statements.

Added an optimization for PC-relative loads (pool load) in ROM (since
it's read only and cannot possibily change) that directly emits an
immediate load. This is way faster, specially in MIPS/x86, ARM can be
even faster if we rewrite the immediate load macros to also use a pool.
2021-05-07 20:41:54 +02:00
David Guillen Fandos 7877a8888b Fix aligned32 reads in interpreter mode
An address check was missing to read aligned 32 (stm/ldm) data from
high mem areas (0xX0000000). This fixes SM4 EU that for some reason has
some weird memory access (perhaps a bug?)
2021-05-05 21:33:48 +02:00
David Guillen Fandos 883f07f487 Fix small buf and add cheat error messages
Some minor formating too
2021-05-05 21:15:27 +02:00
David Guillen Fandos 4fd456e158 Adding Code Breaker cheat support
This works on both interpreter and dynarec.
Tested in MIPS, ARM and x86, still needs some more testing, some edge
cases can be buggy.
2021-05-05 21:15:27 +02:00
negativeExponent 52088a4d10 Fix invalid memory map entries 2021-04-28 01:05:11 +02:00
David Guillen Fandos d83f8fbd25 Fix Vita port and likely some Linux/Android hidden issues
Using an invalid SP makes Vita crash (for an unkown reason) and makes
things like C signal handlers crash (luckily Retroarch doesn't use
them). It is also a violation of the ABI and not a great idea.
Recycled some little used registers to free SP. Perf should be roughly
the same.
2021-04-27 18:39:46 +02:00
David Guillen Fandos ff48af07b0 Fix RTC support for MIPS 2021-04-26 19:42:59 +02:00
David Guillen Fandos a5c06f62d6 Fix palette writes in MIPS
Was not writing to the right address (but decoded memory was working).
Most game worked well except those that depend on modifying the existing
palette bits (instead of copying from ROM/RAM). Fixes several games.
2021-04-04 18:13:15 +02:00
David Guillen Fandos 5bee4d66c2 Do not use stack in mips stubs
No need for it (faster) and avoid mis-aligning it across calls
2021-04-03 23:43:32 +02:00
David Guillen Fandos 5b5a4db6c2 Add instruction tracing, for testing purposes 2021-04-03 00:37:42 +02:00
David Guillen Fandos 8c14ac9619 Add function decorators for easier debugging / profiling 2021-04-02 02:10:00 +02:00
David Guillen Fandos 71ebc49b59 Improve indirect jumps in ARM
Handle already translated blocks in the ARM asm to speed up indirect
branches (affect some games more than others)
2021-03-30 21:06:52 +02:00
David Guillen Fandos 336b14a876 Improve ARM store handlers 2021-03-30 01:21:48 +02:00
twinaphex fd20793545 Add CROSS_COMPILE rules 2021-03-27 15:09:01 +01:00
Autechre 08d2fa1ebe
Merge pull request #120 from davidgfnet/master
Fixes and improvements for MIPS and ARM
2021-03-27 00:31:51 +01:00
David Guillen Fandos 452ba76ba8 Fix 16 bit RAM stores (VRAM and OAM) in ARM 2021-03-26 23:13:26 +01:00
David Guillen Fandos d284c868e9 Improve ARM store accesses 2021-03-26 23:13:26 +01:00
David Guillen Fandos 7ea6c5e247 Move OAM RAM to stubs also
Makes accesses more efficient for MIPS. Make accesses also fast for palette
reads.
2021-03-26 23:13:26 +01:00
David Guillen Fandos a494a3f00e Move OAM update flag to a register
Fix a small bug in MIPS dynarec that affects non -G0 targets
2021-03-26 23:13:26 +01:00
Autechre 53cc4a2475
Merge pull request #119 from jdgleaver/dingux-beta-fix
Fix OpenDingux Beta build
2021-03-26 17:32:51 +01:00
jdgleaver 3db35eab70 Fix OpenDingux Beta build 2021-03-26 16:03:46 +00:00
twinaphex 6f2d0bbee8 Add od-beta 2021-03-25 21:21:21 +01:00
Autechre e5c685583e
Merge pull request #118 from davidgfnet/master 2021-03-23 20:13:44 +01:00
David Guillen Fandos ff510e7f7a Move caches to stub files to get around gcc 10
Seems that using the __atribute__ magic for sections is not the best way
of doing this, since it injects some default atributtes that collide
with the user defined ones. Using assembly is far easier in this case.

Reworked definitions a bit to make it easier to import from assembly.
Also wrapped stuff around macros for easy and less verbose
implementation of the symbol prefix issue.
2021-03-23 20:02:44 +01:00
Autechre f31fa6a57b
Merge pull request #117 from davidgfnet/asmfixes2
Make ewram memory linear
2021-03-23 19:43:20 +01:00
David Guillen Fandos 11ec213c99 Make ewram memory lineal
This saves a few cycles in MIPS and simplifies a bit the core.
Removed the write map, only affects interpreter performance very
minimally. Rewired ARM and x86 handlers to support direct access to
I/EWRAM (and VRAM on ARM) to compensate. Overall performance is slightly
better but code is cleaner and allows for further improvements in the
dynarecs.
2021-03-23 19:09:56 +01:00
Autechre 7e27010a3c
Merge pull request #116 from davidgfnet/master
Export double symbol to cover Win but also Apple compilers
2021-03-23 01:00:27 +01:00
David Guillen Fandos 55eaee631d Export double symbol to cover Win but also Apple compilers 2021-03-23 00:50:34 +01:00
Autechre 128ad07777
Merge pull request #115 from davidgfnet/master
Fix Windows compilers symbol names
2021-03-22 23:27:36 +01:00
David Guillen Fandos 8c18c8c421 Fix Windows compilers symbol names 2021-03-22 23:17:24 +01:00
Autechre f3ce8bbd0c
Merge pull request #114 from davidgfnet/master
Adding Normmatt's BIOS as a built-in BIOS
2021-03-22 22:18:13 +01:00
David Guillen Fandos f6f3a91039 Adding Normmatt's BIOS as a built-in BIOS
Add options to select whether to boot from BIOS (default is no, as it is
now) and whether to use the original bios or the builtin one (default is
auto, which tries to use the official but falls back to the builtin if
not found).
2021-03-22 21:45:52 +01:00
Autechre 5ef784ab8a
Merge pull request #112 from davidgfnet/master
Enable runtime dynarec enable/disable
2021-03-18 03:15:03 +01:00
Autechre 11632ad5e3
Merge pull request #113 from davidgfnet/asmfixes2
asm fixes for clang
2021-03-18 03:14:55 +01:00
David Guillen Fandos 9de4220376 asm fixes for clang 2021-03-18 01:20:14 +01:00
David Guillen Fandos eab44b9e0b Enable runtime dynarec enable/disable
Added a more thorough cache cleanup for reset/mode-change too.
Fixed the mmap initialization that ends up leaking memory.
Minor x86 asm fixes for Android.
2021-03-17 21:05:49 +01:00
Autechre 3dfdaaa8d9
Merge pull request #111 from davidgfnet/master
Remove BIOS reserved translation area
2021-03-17 19:09:12 +01:00
David Guillen Fandos fb7ca09b01 Remove BIOS reserved translation area
This is not really necessary since it can share area with ROM.
Performance impact should be very minimal (haven't noticed it myself)
and could be compensated (even by a positive offset) if we bump the ROM
cache area size.
Tested with several dynarecs.
2021-03-17 18:33:02 +01:00
Autechre 85ba903b19
Merge pull request #110 from davidgfnet/master
Rewrite the MIPS stub backend to add OpenDingux
2021-03-17 07:20:55 +01:00
David Guillen Fandos 34e672ed25 Simplify open load handling for MIPS and fix other arches
Also rewrite a bit memory handlers for smaller functions.
2021-03-16 22:58:58 +01:00
David Guillen Fandos 6b503667ec Add Dingux support
Uses a different cache primitive and a differend madd(u) encoding.
Also added a flag for BGR vs RGB color output (since PSP is assuming to
be BGR for speed).
Aside from that the ABI required some special function calls for PIC.
2021-03-16 22:58:58 +01:00
David Guillen Fandos 80be1e3447 Remove old handlers from mips/stub 2021-03-16 22:58:58 +01:00