Commit Graph

28 Commits

Author SHA1 Message Date
David Guillen Fandos 37430f22c5 Small optimization (~2-4%) and whitespace cleanup!
Cleans up a ton of whitespace in cpu.c (like 100KB!) and improves
readability of some massive decode statements.

Added an optimization for PC-relative loads (pool load) in ROM (since
it's read only and cannot possibily change) that directly emits an
immediate load. This is way faster, specially in MIPS/x86, ARM can be
even faster if we rewrite the immediate load macros to also use a pool.
2021-05-07 20:41:54 +02:00
David Guillen Fandos 4fd456e158 Adding Code Breaker cheat support
This works on both interpreter and dynarec.
Tested in MIPS, ARM and x86, still needs some more testing, some edge
cases can be buggy.
2021-05-05 21:15:27 +02:00
David Guillen Fandos 5b5a4db6c2 Add instruction tracing, for testing purposes 2021-04-03 00:37:42 +02:00
David Guillen Fandos 7ea6c5e247 Move OAM RAM to stubs also
Makes accesses more efficient for MIPS. Make accesses also fast for palette
reads.
2021-03-26 23:13:26 +01:00
David Guillen Fandos a494a3f00e Move OAM update flag to a register
Fix a small bug in MIPS dynarec that affects non -G0 targets
2021-03-26 23:13:26 +01:00
David Guillen Fandos ff510e7f7a Move caches to stub files to get around gcc 10
Seems that using the __atribute__ magic for sections is not the best way
of doing this, since it injects some default atributtes that collide
with the user defined ones. Using assembly is far easier in this case.

Reworked definitions a bit to make it easier to import from assembly.
Also wrapped stuff around macros for easy and less verbose
implementation of the symbol prefix issue.
2021-03-23 20:02:44 +01:00
David Guillen Fandos 11ec213c99 Make ewram memory lineal
This saves a few cycles in MIPS and simplifies a bit the core.
Removed the write map, only affects interpreter performance very
minimally. Rewired ARM and x86 handlers to support direct access to
I/EWRAM (and VRAM on ARM) to compensate. Overall performance is slightly
better but code is cleaner and allows for further improvements in the
dynarecs.
2021-03-23 19:09:56 +01:00
Autechre 5ef784ab8a
Merge pull request #112 from davidgfnet/master
Enable runtime dynarec enable/disable
2021-03-18 03:15:03 +01:00
David Guillen Fandos 9de4220376 asm fixes for clang 2021-03-18 01:20:14 +01:00
David Guillen Fandos eab44b9e0b Enable runtime dynarec enable/disable
Added a more thorough cache cleanup for reset/mode-change too.
Fixed the mmap initialization that ends up leaking memory.
Minor x86 asm fixes for Android.
2021-03-17 21:05:49 +01:00
David Guillen Fandos 34e672ed25 Simplify open load handling for MIPS and fix other arches
Also rewrite a bit memory handlers for smaller functions.
2021-03-16 22:58:58 +01:00
David Guillen Fandos 46cad2958a Move a few more registers to context
This gets rid of some more absolute addrs in the MIPS dynarec.
Tested on several platforms, we should be good.
2021-03-16 01:02:10 +01:00
David Guillen Fandos c86b9064df Move palettes around to simplify MIPS dynarec
Will move also OAM structures to gain a few cycles per load/store.
Loads can also be optimized for an extra instruction per access.
2021-03-15 02:25:02 +01:00
David Guillen Fandos 56dc6ecb70 Remove libco
This removes libco and all the usages of it (+pthreads).
Rewired all dynarecs and interpreter to return after every frame so that
libretro can process events. This required to make dynarec re-entrant.

Dynarecs were updated to check for new frame on every update (IRQ, cycle
exhaustion, I/O write, etc). The performance impact of doing so should
be minimal (and definitely outweight the libco gains). While at it,
fixed small issues to get a bit more perf: arm dynarec was not idling
correctly, mips was using stack when not needed, etc.

Tested on PSP (mips), OGA (armv7), Linux (x86 and interpreter). Not
tested on Android though.
2021-03-08 18:44:03 +01:00
David Guillen Fandos 3d558413fd Fix x86 dynarec, broken by d10c4afe
The dynarec expects function args to be located in registers instead of
the stack, which is not the default calling convetion in GCC/clang.
2021-03-06 21:15:22 +01:00
Twinaphex d10c4afea2 Get rid of function_cc 2014-12-20 09:14:38 +01:00
twinaphex 1c4095a014 Add game_config.txt 2014-12-14 00:26:15 +01:00
twinaphex 5b59ef3acc Reimplement cache invalidation code 2014-12-11 18:47:48 +01:00
aliaspider a926a68eb3 cleanups 2014-12-10 12:53:26 +01:00
aliaspider 6d7fd87e07 add a HAVE_MMAP check, cleanups. 2014-12-10 12:29:19 +01:00
twinaphex fe19474dca Add macro parameter 'opcode' to some macros 2014-12-10 01:17:37 +01:00
aliaspider 3cc3944725 add debug build option to x86 standalone target. 2014-12-09 02:43:59 +01:00
aliaspider 35e1e44a11 fix binary name for the x86 target on non windows platforms. 2014-12-08 22:55:41 +01:00
twinaphex 7bb77f4fc0 Dump required game_config.txt into working directory x86/ for now 2014-07-14 19:56:34 +02:00
aliaspider 0ccab79884 fix x86 build 2014-07-14 06:10:33 +01:00
notaz bbba320911 enable -Wall and fix warnings reported by it 2011-09-06 00:18:06 +03:00
notaz eac6971733 revive PC build, support Linux 2011-09-03 01:05:41 +03:00
notaz 2823a4c819 original source from gpsp09-2xb_src.tar.bz2 2009-05-21 18:48:31 +03:00