Commit Graph

762 Commits

Author SHA1 Message Date
mudlord eb7d708d71
Use proper VFS version.
VFS callbacks fail since it requires V2, which includes vfs_truncate. Otherwise it falls back to libretro-common code. Current VFS wrapping code in libretro-common needs V2 since vfs_truncate's callback is set.

https://github.com/libretro/libretro-common/blob/master/streams/file_stream.c#L65

Now VFS callbacks work properly in frontends that support them. Otherwise a hack of setting "cb->required_interface_version = 2" in frontend works. Only cores, according to specs, are meant to set the required version.
2023-01-31 05:39:52 +11:00
andymcca 2fcbdc1d17
MODE_UNDEFINED is 0x1B (not 0x1C) (#184)
In the cpu_modes array, MODE_UNDEFINED is at position 0x1C, but this mode value is actually 0x1B.
2023-01-21 21:44:23 +01:00
David Guillen Fandos 4f3c9a5e58 [all] Fix CPSR and CPU modes
gpsp doesn't differentiate between USER and SYSTEM mode, most likely
cause it is not that important for most games. This implements the modes
correctly and adds checks for privileged operations. Still some
bugs/hacks but it mostly fixes CPSR/SPSR reads/writes.

To implement PSR writes we are using a more refined masks and force mode
bit num. 4 to always be one. Reserved bits are forced to zero (this
needs to be validated on a real device).
2023-01-11 21:26:32 +01:00
libretroadmin ad84141fd6 Set aspect ratio to 3/2 2023-01-09 04:21:23 +01:00
David Guillen Fandos 90170e3389 [arm] Fix usermode "movs pc" causing invalid CPU state
A missing usermode check (present in MIPS and x86) causes user-mode
returns to attempt returning into another CPU mode, which causes a bunch
of issues, mainly going into an invalid CPU state and corrupting some
registers.

This fixes a couple of games only (Colin McRae Rally 2, TOCA World
Touring, Starsky & Hutch ...)
2023-01-05 21:29:20 +01:00
David Guillen Fandos 53ac0814de [x86/64] Fix openbus reads (PC is corrupted) 2023-01-05 21:29:20 +01:00
David Guillen Fandos b552d5eb7e Improve open bus reads on ARM/MIPS 2023-01-05 21:29:20 +01:00
David Guillen Fandos 8c4196d19e Add MIPS codegen tests 2023-01-05 21:29:20 +01:00
LibretroAdmin 81649a2c80
Update .gitlab-ci.yml 2022-07-26 14:28:22 +02:00
LibretroAdmin 03fc2b7dbf
Merge pull request #171 from d30r/patch-1
Pokemon Fire Red germany not booting/ White Screen
2022-05-20 22:18:52 +01:00
d30r 5e71cd14d1
Pokemon Fire Red germany not booting/ White Screen
Wrong Gamepak Code causing Pokemon Fire Red not to boot due to wrong flash size (64k instead of 128k)
2022-05-20 13:41:20 +02:00
twinaphex f0f0b31f9a Cleanups 2022-04-09 08:50:38 +02:00
Autechre d4547baf26
Merge pull request #168 from jSTE0/miyoo-small-cache
platforms/miyoo: Use small translation cache
2022-04-04 00:51:29 +01:00
jSTE0 20c09d773c platforms/miyoo: Use small translation cache
As this platform only has 32MB RAM.
2022-04-03 18:55:48 +01:00
twinaphex e554360dd3 Fix for loop initial declaration errors 2022-01-19 19:00:57 +01:00
David Guillen Fandos 4eac8e30a8 Add WAITCNT but do nothing for now 2022-01-05 21:43:03 +01:00
David Guillen Fandos dbbefdf021 [arm] Implement movw/movt for ARMv7
This should speed it up a bit on platforms like Vita.
2022-01-05 17:12:35 +01:00
David Guillen Fandos b6ddec8fa0 Simplify lookup/translate logic to make it simpler. 2022-01-05 16:32:42 +01:00
David Guillen Fandos cb9696cb98 Fix blh for arm/mips to use a thumb branch (not dual)
Also fix ARM32 LR offset, was being truncated to 8 bit when it is a 12
bit offset.
2022-01-04 19:11:36 +01:00
David Guillen Fandos f597836abc Implement dual mode (arm/thumb) for RAM positions
(This is similar to 908fb8 but for memory regions)

Removes the weird offset encoding in favour of a metadata structure,
similar to what there was before. However this structure overlaps with
the cache ram itself and grows like a stack. This is to avoid wating
memory since most games only use a few blocks.
Simplify the "dual" block lookup routines too, since they are only an
extrypoint to the other two real modes.
2022-01-04 18:59:07 +01:00
David Guillen Fandos 8036ad5b50 Fix ram flush again! Wrapping mirrors are hard to track
Track PC on every iteration, round up a couple of instructions and align
the base address for speed.
2022-01-04 00:51:48 +01:00
David Guillen Fandos e71290e0ad Fix out of bounds RAM flush.
This can happen whenever the PC wraps around a mirror.
2022-01-03 01:23:51 +01:00
David Guillen Fandos 908fb831e0 Implement dynarec mode check for ROM code
This allows the emulator to recompile the same block as ARM and Thumb.
Some games do execute some code both as ARM and Thumb if you can believe
it! Also the dynarec can be a bit aggressive at pre-compiling some
blocks and can misunderstand branches in the wrong mode.

This fixes NBA Jam 2002 for all dynarec backends.
2022-01-03 01:18:47 +01:00
David Guillen Fandos ef399b9315 [mips] Remove IWRAM stack optimization hack
Converted the hack into another... hopefully better hack.
Check for IW/EWRAM addr bit and handle accesses to EWRAM by correcting
the base addr and the mirroring range.
Assumes that iwram and ewram buffers are at a distance multiple of 64KB
for speed (so that lw/sw offsets can be shared).

This fixes a variety of games that should have been present in
game_config.txt such as Ninja Cop, Star Wars JPB, Medal of Honor,
Spongebob, etc. Some of them were just missing regional versions of the
cart. It also fixes newer games and homebrew such as GoodBoy Galaxy.
2021-12-30 23:39:09 +01:00
David Guillen Fandos 56f00c162e [mips] Improve SP relative accesses 2021-12-30 00:57:16 +01:00
David Guillen Fandos daac3b7d91 Penalize HLE division, it's just too fast :) 2021-12-21 20:06:24 +01:00
David Guillen Fandos f085883ba7 Merge branch 'cycle-remainder' into better_cycles
Account for both DMA cycles and remainder cycles
2021-12-21 20:05:44 +01:00
David Guillen Fandos 3a6ca8d941 Better cycle accounting, taking remainders partially into account 2021-12-21 19:59:33 +01:00
David Guillen Fandos bc8c07272b Add DMA cycle accounting for H/V blank and sound DMA
This is just responsible for a few cycles every frame (could be around 1
and 2% depending on the game usage) but makes emulation a bit more
accurate and potentially faster.
2021-12-21 12:02:48 +01:00
David Guillen Fandos 7b181cb6ff Fix PC calculation for open bus loads
It was pretty much broken in all platforms, just "ok" enough for it to
work on some games though.
2021-12-20 19:31:33 +01:00
David Guillen Fandos 12cd4e0c06 [aarch64] Add I/O write specific path for speed 2021-12-19 22:35:07 +01:00
David Guillen Fandos 5fbbcfe415 [aarch64] Add accelerated palette writes 2021-12-19 21:01:08 +01:00
David Guillen Fandos d0fd474777 [arm] Fix multiply (muls) and 64 bit mul where rlo==rhi
Seems rhi has precedence over rlo
2021-12-17 10:46:45 +01:00
David Guillen Fandos cce51c948d Minor code refactor, no-op 2021-12-15 21:01:05 +01:00
David Guillen Fandos 88454e922f [MIPS] Correctly implement adcs/sbcs/rscs
Also fix C flag calculation for immediates.
Fixes a couple of games.
2021-12-15 19:02:02 +01:00
David Guillen Fandos c30f910fe8 [interpreter] Fix many flag related bugs including Op2 C flag
This fixes a few games and GBA-V too. C flag was neglected on Op2
immediate. Many add/adc related ops were broken due to carry in.
2021-12-14 00:46:37 +01:00
David Guillen Fandos 9b25f26ed8 [x86] Fix division r3 sign value calculation 2021-12-13 22:26:49 +01:00
David Guillen Fandos c6601d8932 [aarch64] Fix cache flushing out of bounds
Seems like some platforms don't like this very much :|
2021-12-13 18:54:21 +01:00
David Guillen Fandos 76ccba445f [aarch64] Fix mov bug that got in in the last minute :D 2021-12-13 18:49:42 +01:00
David Guillen Fandos fae9c7074b Fix dynarec flag optimization in Thumb mode
Usually blocks end with a branch, which also consumes all flags, but in
case the block is aborted early (or any other reason to not finish the
block on a branch), it will result in only a subset of flags being
generated, which causes problems in a couple of games.

This performs an out of bounds flag read, which is incorrect
2021-12-13 18:42:06 +01:00
David Guillen Fandos 09cab16654 [x86] Do not generate unnecessary flags (optimization) 2021-12-13 18:31:01 +01:00
David Guillen Fandos bcd3d1ca29 [aarch64] Adding new aarch64 dynarec!
This is based on the MIPS dynarec (more or less) with some ARM
borrowings. Seems to be quite fast (under my testing fixed results:
faster than ARM on A1 but not a lot faster than the interpreter on
Android Snapdragon 845) but still some optimizations are missing at the
moment.

Seems to pass my testing suite and compatibility wise is very similar to
arm.
2021-12-12 13:18:13 +01:00
David Guillen Fandos 2419b77b28 Add reg tracing capability (for devs) 2021-12-11 11:27:59 +01:00
David Guillen Fandos 31451d16ff [mips] Fix CPSR store bug during IRQ
Similarly to 61ef776, this fixes the bug for MIPS.
2021-12-10 19:28:06 +01:00
David Guillen Fandos 61ef776fed [x86] Fix CPSR store bug in LR register
There's a race condition on CPSR store (only if mode is changed) where,
if an IRQ is pending, the IRQ will be served, but the saved LR value
will be wrong (will skip the return instruction).
Fixed this and improved the logic a bit to make it faster and not use
unnecessary save slots.
2021-12-10 19:09:20 +01:00
David Guillen Fandos 1667597a43 Fix MIPS s16 unaligned load (although it does not fix any game) 2021-12-09 20:04:56 +01:00
David Guillen Fandos a435c712f8 [x86] Fix multiplication flags for 64 bit muls
This fixes a couple of games.
2021-12-06 18:15:56 +01:00
Autechre be3fdfd0b4
Merge pull request #165 from jdgleaver/audio-sample-pacing
Send audio samples to frontend with correct pacing
2021-11-30 12:03:19 +01:00
jdgleaver 20bd7c111b Calculate number of audio samples to read per frame deterministically 2021-11-29 17:45:06 +00:00
jdgleaver f8359a74d3 Send audio samples to frontend with correct pacing 2021-11-29 15:10:38 +00:00