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Fix blh for arm/mips to use a thumb branch (not dual) 

Also fix ARM32 LR offset, was being truncated to 8 bit when it is a 12
bit offset.
This commit is contained in:
David Guillen Fandos 2022-01-04 19:11:36 +01:00
parent f597836abc
commit cb9696cb98
3 changed files with 10 additions and 6 deletions
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2
arm/arm64_emit.h
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@ -1788,7 +1788,7 @@ u32 execute_store_cpsr_body(u32 _cpsr, u32 store_mask, u32 address)
thumb_decode_branch(); \
generate_alu_imm(addi, add, reg_a0, reg_r14, (offset * 2)); \
generate_load_pc(reg_r14, ((pc + 2) | 0x01)); \
generate_indirect_branch_cycle_update(dual); \
generate_indirect_branch_cycle_update(thumb); \
break; \
} \

9
arm/arm_emit.h
View File

@ -1923,11 +1923,16 @@ static void trace_instruction(u32 pc, u32 mode)
#define thumb_blh() \
{ \
thumb_decode_branch(); \
u32 offlo = (offset * 2) & 0xFF; \
u32 offhi = (offset * 2) >> 8; \
generate_update_pc(((pc + 2) | 0x01)); \
thumb_generate_load_reg(reg_a1, REG_LR); \
thumb_generate_store_reg(reg_a0, REG_LR); \
generate_add_reg_reg_imm(reg_a0, reg_a1, (offset * 2), 0); \
generate_indirect_branch_cycle_update(dual_thumb); \
generate_add_reg_reg_imm(reg_a0, reg_a1, offlo, 0); \
if (offhi) { \
generate_add_reg_reg_imm(reg_a0, reg_a0, offhi, arm_imm_lsl_to_rot(8)); \
} \
generate_indirect_branch_cycle_update(thumb); \
} \
#define thumb_bx() \

5
mips/mips_emit.h
View File

@ -1809,10 +1809,9 @@ u32 execute_store_cpsr_body(u32 _cpsr, u32 address)
#define thumb_blh() \
{ \
thumb_decode_branch(); \
generate_alu_imm(addiu, addu, reg_a0, reg_r14, (offset * 2)); \
mips_emit_addiu(reg_a0, reg_r14, (offset * 2)); \
generate_load_pc(reg_r14, ((pc + 2) | 0x01)); \
generate_indirect_branch_cycle_update(dual); \
break; \
generate_indirect_branch_cycle_update(thumb); \
} \
#define thumb_bx() \