Seems that ABI mandates that we allocate space for arg0..4 even if we do
pass them as registers. For some reason write_io_register<> functions
write in that stack area (1 word) corrupting the s0 saved register.
This seems to be a new gcc behaviour?
This only needs some support to save/load state with 64 bit registers.
Since pointers remain 32 bit, no extra changes are needed in the
dynarec. Verified with qemu (qemu-mipsn32el) and miniretro.
This might make a handful games slightly slower (but on the upper side
they work now instead of crashing or restarting).
Also while at it, fix some minor stuff in arm stubs for speed.
Cleans up a ton of whitespace in cpu.c (like 100KB!) and improves
readability of some massive decode statements.
Added an optimization for PC-relative loads (pool load) in ROM (since
it's read only and cannot possibily change) that directly emits an
immediate load. This is way faster, specially in MIPS/x86, ARM can be
even faster if we rewrite the immediate load macros to also use a pool.
An address check was missing to read aligned 32 (stm/ldm) data from
high mem areas (0xX0000000). This fixes SM4 EU that for some reason has
some weird memory access (perhaps a bug?)
Using an invalid SP makes Vita crash (for an unkown reason) and makes
things like C signal handlers crash (luckily Retroarch doesn't use
them). It is also a violation of the ABI and not a great idea.
Recycled some little used registers to free SP. Perf should be roughly
the same.
Was not writing to the right address (but decoded memory was working).
Most game worked well except those that depend on modifying the existing
palette bits (instead of copying from ROM/RAM). Fixes several games.
Seems that using the __atribute__ magic for sections is not the best way
of doing this, since it injects some default atributtes that collide
with the user defined ones. Using assembly is far easier in this case.
Reworked definitions a bit to make it easier to import from assembly.
Also wrapped stuff around macros for easy and less verbose
implementation of the symbol prefix issue.
This saves a few cycles in MIPS and simplifies a bit the core.
Removed the write map, only affects interpreter performance very
minimally. Rewired ARM and x86 handlers to support direct access to
I/EWRAM (and VRAM on ARM) to compensate. Overall performance is slightly
better but code is cleaner and allows for further improvements in the
dynarecs.
Add options to select whether to boot from BIOS (default is no, as it is
now) and whether to use the original bios or the builtin one (default is
auto, which tries to use the official but falls back to the builtin if
not found).
David Guillen Fandos
Autechre
jdgleaver
negativeExponent