Commit Graph

34 Commits

Author SHA1 Message Date
David Guillen Fandos 37430f22c5 Small optimization (~2-4%) and whitespace cleanup!
Cleans up a ton of whitespace in cpu.c (like 100KB!) and improves
readability of some massive decode statements.

Added an optimization for PC-relative loads (pool load) in ROM (since
it's read only and cannot possibily change) that directly emits an
immediate load. This is way faster, specially in MIPS/x86, ARM can be
even faster if we rewrite the immediate load macros to also use a pool.
2021-05-07 20:41:54 +02:00
David Guillen Fandos 7877a8888b Fix aligned32 reads in interpreter mode
An address check was missing to read aligned 32 (stm/ldm) data from
high mem areas (0xX0000000). This fixes SM4 EU that for some reason has
some weird memory access (perhaps a bug?)
2021-05-05 21:33:48 +02:00
David Guillen Fandos 4fd456e158 Adding Code Breaker cheat support
This works on both interpreter and dynarec.
Tested in MIPS, ARM and x86, still needs some more testing, some edge
cases can be buggy.
2021-05-05 21:15:27 +02:00
David Guillen Fandos 7ea6c5e247 Move OAM RAM to stubs also
Makes accesses more efficient for MIPS. Make accesses also fast for palette
reads.
2021-03-26 23:13:26 +01:00
David Guillen Fandos 11ec213c99 Make ewram memory lineal
This saves a few cycles in MIPS and simplifies a bit the core.
Removed the write map, only affects interpreter performance very
minimally. Rewired ARM and x86 handlers to support direct access to
I/EWRAM (and VRAM on ARM) to compensate. Overall performance is slightly
better but code is cleaner and allows for further improvements in the
dynarecs.
2021-03-23 19:09:56 +01:00
David Guillen Fandos f6f3a91039 Adding Normmatt's BIOS as a built-in BIOS
Add options to select whether to boot from BIOS (default is no, as it is
now) and whether to use the original bios or the builtin one (default is
auto, which tries to use the official but falls back to the builtin if
not found).
2021-03-22 21:45:52 +01:00
David Guillen Fandos fb7ca09b01 Remove BIOS reserved translation area
This is not really necessary since it can share area with ROM.
Performance impact should be very minimal (haven't noticed it myself)
and could be compensated (even by a positive offset) if we bump the ROM
cache area size.
Tested with several dynarecs.
2021-03-17 18:33:02 +01:00
David Guillen Fandos 46cad2958a Move a few more registers to context
This gets rid of some more absolute addrs in the MIPS dynarec.
Tested on several platforms, we should be good.
2021-03-16 01:02:10 +01:00
David Guillen Fandos c86b9064df Move palettes around to simplify MIPS dynarec
Will move also OAM structures to gain a few cycles per load/store.
Loads can also be optimized for an extra instruction per access.
2021-03-15 02:25:02 +01:00
David Guillen Fandos 56dc6ecb70 Remove libco
This removes libco and all the usages of it (+pthreads).
Rewired all dynarecs and interpreter to return after every frame so that
libretro can process events. This required to make dynarec re-entrant.

Dynarecs were updated to check for new frame on every update (IRQ, cycle
exhaustion, I/O write, etc). The performance impact of doing so should
be minimal (and definitely outweight the libco gains). While at it,
fixed small issues to get a bit more perf: arm dynarec was not idling
correctly, mips was using stack when not needed, etc.

Tested on PSP (mips), OGA (armv7), Linux (x86 and interpreter). Not
tested on Android though.
2021-03-08 18:44:03 +01:00
twinaphex 4036107852 Prevent bunch of warnings 2015-07-26 04:44:17 +02:00
twinaphex cf973d0c5f Rename cpu_orig.c to cpu.c 2014-12-14 02:51:43 +01:00
twinaphex cefd5b63ee Remove a lot of the GNU case range extensions instances 2014-12-13 04:50:48 +01:00
twinaphex 72573712d3 CPU interpreter - group more case ranges together 2014-12-12 16:52:23 +01:00
twinaphex 701e2bbf50 CPU interpreter - group THUMB cases 0x38 to 0x3F (SUB) together 2014-12-12 06:48:20 +01:00
twinaphex 4a6d527b1c Use thumb_opcode_val & 0x7 instead 2014-12-12 06:45:20 +01:00
twinaphex c1677498a5 CPU interpreter - group THUMB case range 0x30 to 0x37 (ADD) together 2014-12-12 06:42:59 +01:00
twinaphex 4a860b662e CPU interpreter - group THUMB cases 0x28 to 0x2F together 2014-12-12 06:35:17 +01:00
twinaphex ade2bed514 CPU interpreter - group Thumb opcode case ranges 0x20 - 0x27 together 2014-12-12 06:31:16 +01:00
twinaphex f9079ff9fb execute_arm_instruction and execute_thumb_instruction - throw them
straight into execute_arm/execute_thumb functions
2014-12-12 06:12:00 +01:00
twinaphex 51d78afa09 Add HAVE_DYNAREC ifdef 2014-12-10 17:06:09 +01:00
twinaphex 512f7f5b27 Code nits - get rid of '== NULL' / '!= NULL' 2014-12-10 16:40:43 +01:00
twinaphex 7a0b0cba45 Style nits 2014-12-10 15:47:19 +01:00
aliaspider a926a68eb3 cleanups 2014-12-10 12:53:26 +01:00
aliaspider ad485d434a implement retro_serialize/unserialize 2014-12-10 11:06:17 +01:00
twinaphex ce374b460b Remove SDL code in cpu.c 2014-12-10 01:30:47 +01:00
twinaphex fe19474dca Add macro parameter 'opcode' to some macros 2014-12-10 01:17:37 +01:00
twinaphex 5c949f38e4 Assume PC_BUILD 2014-12-09 17:18:45 +01:00
twinaphex a4a7f66364 Remove gui.c 2014-12-09 16:40:21 +01:00
aliaspider b69fee8b31 video output now works in statically linked builds.
core can't be used as a shared library yet due to the dynarec not
working when compiled with -fPIC
2014-12-09 05:16:09 +01:00
aliaspider 8f9b841f72 can compile 2014-12-09 00:17:28 +01:00
notaz bbba320911 enable -Wall and fix warnings reported by it 2011-09-06 00:18:06 +03:00
notaz 8b6232a675 fix some warnings 2011-09-03 01:31:26 +03:00
notaz 2823a4c819 original source from gpsp09-2xb_src.tar.bz2 2009-05-21 18:48:31 +03:00