Commit Graph

14 Commits

Author SHA1 Message Date
David Guillen Fandos c0d8ffaa38 Adding DMA transfer "Sleep" mode
This accounts for DMA stealing cycles from the CPU whenever the CPU
triggers a DMA (does not affect H/V blank or sound DMAs).
Works by moving the CPU to a PAUSED state where the cycles are accounted
for, reusing a similar mechanism for HALT/STOP.

Fixes a couple of games, notably GTA that has a DMA/IRQ race condition
(likely a bug really) if cycles are grossly miscalculated.
2023-09-08 19:44:13 +02:00
David Guillen Fandos 1d1c719372 Remove COMPLETED_FRAME flag to simplify things 2023-09-06 00:48:37 +02:00
David Guillen Fandos 5f3e0a88cf Remove alert_loop in favour of cpu_sleep_loop 2023-09-06 00:02:47 +02:00
David Guillen Fandos f4e65d15c0 [arm/arm64] Fix OAM/VRAM byte writes
Forgot to add byte-doubling codepath for byte writes. This is correctly
implemented in x86 and MIPS.
2023-04-26 00:29:38 +02:00
David Guillen Fandos eb50c15b1c Remove CHANGED_PC_STATUS, simplify update flow 2023-04-24 20:24:03 +02:00
David Guillen Fandos 11d87b89df Rewrite I/O side effects write and IRQ triggers
This rewrites the way that CPU alerts work, making them a bitmap (since
multiple alerts can happen simultaneously, like SMC and IRQ). This
doesn't really fix many games but improves accuracy overall and improves
performance on some I/O writes (the ones without side effects).
The IRQ raising is now decoupled and explicitely called via a new
function (check_and_raise_interrupts) to avoid issues such as invalid
CPSR values (doesn't seem to bother most games!). There's more side
effects missing, so this just lays the ground for more fixes.
2023-04-14 01:41:55 +02:00
David Guillen Fandos dc4ec94cbc [arm64] Remove unused epilogue check 2023-04-08 17:14:39 +02:00
David Guillen Fandos 541adc9e1c Fix ROM swapping capabilities
This fixes ROM swapping for x86/64, arm32 and arm64. On top of that it
improves speed by removing unnecessary slow paths on small ROMs for
arm32 and mips. If the ROM can fit in RAM, it will emit more efficient
code that assumes the ROM is fully loaded.

For low-memory Linux platforms it would be better to use some mmap'ed
ROM, that way the OS would transparently handle page swapping, which is
perhaps faster. Will investigate and follow up on this in a separate
commit.
2023-03-03 21:05:12 +01:00
David Guillen Fandos 4f3c9a5e58 [all] Fix CPSR and CPU modes
gpsp doesn't differentiate between USER and SYSTEM mode, most likely
cause it is not that important for most games. This implements the modes
correctly and adds checks for privileged operations. Still some
bugs/hacks but it mostly fixes CPSR/SPSR reads/writes.

To implement PSR writes we are using a more refined masks and force mode
bit num. 4 to always be one. Reserved bits are forced to zero (this
needs to be validated on a real device).
2023-01-11 21:26:32 +01:00
David Guillen Fandos b552d5eb7e Improve open bus reads on ARM/MIPS 2023-01-05 21:29:20 +01:00
David Guillen Fandos 3a6ca8d941 Better cycle accounting, taking remainders partially into account 2021-12-21 19:59:33 +01:00
David Guillen Fandos 12cd4e0c06 [aarch64] Add I/O write specific path for speed 2021-12-19 22:35:07 +01:00
David Guillen Fandos 5fbbcfe415 [aarch64] Add accelerated palette writes 2021-12-19 21:01:08 +01:00
David Guillen Fandos bcd3d1ca29 [aarch64] Adding new aarch64 dynarec!
This is based on the MIPS dynarec (more or less) with some ARM
borrowings. Seems to be quite fast (under my testing fixed results:
faster than ARM on A1 but not a lot faster than the interpreter on
Android Snapdragon 845) but still some optimizations are missing at the
moment.

Seems to pass my testing suite and compatibility wise is very similar to
arm.
2021-12-12 13:18:13 +01:00