Fix ROM swapping capabilities
This fixes ROM swapping for x86/64, arm32 and arm64. On top of that it improves speed by removing unnecessary slow paths on small ROMs for arm32 and mips. If the ROM can fit in RAM, it will emit more efficient code that assumes the ROM is fully loaded. For low-memory Linux platforms it would be better to use some mmap'ed ROM, that way the OS would transparently handle page swapping, which is perhaps faster. Will investigate and follow up on this in a separate commit.
This commit is contained in:
David Guillen Fandos
parent
42c6bb2761
commit
541adc9e1c
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@ -1869,7 +1869,7 @@ extern void* ldst_handler_functions[16*4 + 17*6];
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extern void* ldst_lookup_tables[16*4 + 17*6];
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void init_emitter() {
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void init_emitter(bool must_swap) {
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rom_cache_watermark = INITIAL_ROM_WATERMARK;
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init_bios_hooks();
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@ -443,6 +443,7 @@ ld_rdmap_##load_type: ;\
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lsr w4, w0, #15 /* Each block is 32KB */;\
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add x3, reg_base, #(RDMAP_OFF) ;\
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ldr x4, [x3, x4, lsl #3] /* x4 = table pointer */;\
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cbz x4, ld_slow_##load_type /* not mapped, go slow */ ;\
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and w0, w0, #(0x7fff) /* 32KB pages */;\
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ldop w0, [x4, x0] /* load actual value */;\
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ret ;\
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@ -1981,14 +1981,24 @@ void *div6, *divarm7;
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generate_indirect_branch_no_cycle_update(type) \
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extern u32 ldst_handler_functions[9][17];
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extern u32 ldst_lookup_tables[9][17];
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extern u32 st_handler_functions[4][17];
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extern u32 ld_handler_functions[5][17];
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extern u32 ld_swap_handler_functions[5][17];
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void init_emitter(void) {
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// Tables used by the memory handlers (placed near reg_base)
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extern u32 ld_lookup_tables[5][17];
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extern u32 st_lookup_tables[4][17];
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void init_emitter(bool must_swap) {
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int i;
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// Generate handler table
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memcpy(ldst_lookup_tables, ldst_handler_functions, sizeof(ldst_lookup_tables));
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memcpy(st_lookup_tables, st_handler_functions, sizeof(st_lookup_tables));
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// Issue faster paths if swapping is not required
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if (must_swap)
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memcpy(ld_lookup_tables, ld_swap_handler_functions, sizeof(ld_lookup_tables));
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else
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memcpy(ld_lookup_tables, ld_handler_functions, sizeof(ld_lookup_tables));
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rom_cache_watermark = INITIAL_ROM_WATERMARK;
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u8 *translation_ptr = (u8*)&rom_translation_cache[0];
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@ -803,7 +803,20 @@ ld_oamram_##load_type: /* OAM RAM area */;\
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exec_ld_op_##load_type(10) /* Clear upper bits (10 LSB) */;\
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add pc, lr, #4 ;\
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;\
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/* ROM area (or VRAM): uses generic memory handlers */ ;\
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/* ROM area: uses generic memory handlers to handle swapping */ ;\
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ld_rdmap_slow_##load_type: ;\
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save_flags() ;\
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add r2, reg_base, #RDMAP_OFF /* r2 = memory_map_read */;\
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mov r1, r0, lsr #15 /* r1 = page index of address */;\
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ldr r2, [r2, r1, lsl #2] /* r2 = base addr */;\
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cmp r2, #0 ;\
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beq 9f /* Page miss, go slow */;\
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;\
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exec_ld_op_##load_type(15) /* Pages are 32KB big */;\
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restore_flags() ;\
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add pc, lr, #4 ;\
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;\
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/* ROM/VRAM area: uses generic memory handlers, assumes is mapped */ ;\
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ld_rdmap_##load_type: ;\
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add r2, reg_base, #RDMAP_OFF /* r2 = memory_map_read */;\
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mov r1, r0, lsr #15 /* r1 = page index of address */;\
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@ -815,6 +828,7 @@ ld_rdmap_##load_type: ;\
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/* Slow load path, for open/unmapped loads */;\
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ld_slow_##load_type: ;\
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save_flags() ;\
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9: ;\
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ldr r1, [lr] /* r1 = PC */;\
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10: ;\
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str r1, [reg_base, #REG_PC] /* update PC */;\
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@ -823,7 +837,7 @@ ld_slow_##load_type: ;\
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add pc, lr, #4 /* return */;\
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#define load_table_gen(load_type) ;\
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#define load_table_gen(load_type, rdmapfn) ;\
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.long ld_slow_##load_type /* -1 (for regions above F) */;\
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.long ld_bios_##load_type /* 0 BIOS */;\
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.long ld_slow_##load_type /* 1 Bad region */;\
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@ -833,11 +847,11 @@ ld_slow_##load_type: ;\
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.long ld_palram_##load_type /* 5 Palette RAM, via map */;\
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.long ld_rdmap_##load_type /* 6 VRAM area */;\
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.long ld_oamram_##load_type /* 7 OAM RAM */;\
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.long ld_rdmap_##load_type /* 8 ROM, via map */;\
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.long ld_rdmap_##load_type /* 9 ROM, via map */;\
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.long ld_rdmap_##load_type /* A ROM, via map */;\
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.long ld_rdmap_##load_type /* B ROM, via map */;\
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.long ld_rdmap_##load_type /* C ROM, via map */;\
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.long ld_##rdmapfn##_##load_type /* 8 ROM, via map */;\
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.long ld_##rdmapfn##_##load_type /* 9 ROM, via map */;\
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.long ld_##rdmapfn##_##load_type /* A ROM, via map */;\
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.long ld_##rdmapfn##_##load_type /* B ROM, via map */;\
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.long ld_##rdmapfn##_##load_type /* C ROM, via map */;\
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.long ld_slow_##load_type /* D ROM or EEPROM/FLASH */;\
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.long ld_slow_##load_type /* E EEPROM/FLASH */;\
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.long ld_slow_##load_type /* F Bad region */;\
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@ -853,16 +867,23 @@ execute_load_builder(u32, 2, read_memory32 )
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.data
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.align 4
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defsymbl(ldst_handler_functions)
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defsymbl(st_handler_functions)
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store_lookup_table(8)
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store_lookup_table(16)
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store_lookup_table(32)
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store_lookup_table(32_safe)
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load_table_gen(u8)
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load_table_gen(s8)
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load_table_gen(u16)
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load_table_gen(s16)
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load_table_gen(u32)
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defsymbl(ld_handler_functions)
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load_table_gen(u8, rdmap)
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load_table_gen(s8, rdmap)
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load_table_gen(u16, rdmap)
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load_table_gen(s16, rdmap)
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load_table_gen(u32, rdmap)
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defsymbl(ld_swap_handler_functions)
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load_table_gen(u8, rdmap_slow)
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load_table_gen(s8, rdmap_slow)
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load_table_gen(u16, rdmap_slow)
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load_table_gen(s16, rdmap_slow)
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load_table_gen(u32, rdmap_slow)
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.bss
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.align 4
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@ -878,8 +899,9 @@ defsymbl(reg)
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defsymbl(spsr)
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.space 24
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@ Place lookup tables here for easy access via base_reg too
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defsymbl(ldst_lookup_tables)
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defsymbl(st_lookup_tables)
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.space 4*17*4 @ store
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defsymbl(ld_lookup_tables)
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.space 5*17*4 @ loads
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.space 132 @ Padding for alignment
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defsymbl(reg_mode)
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2
cpu.h
2
cpu.h
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@ -164,7 +164,7 @@ void flush_translation_cache_rom(void);
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void flush_translation_cache_ram(void);
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void dump_translation_cache(void);
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void init_caches(void);
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void init_emitter(void);
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void init_emitter(bool);
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void init_bios_hooks(void);
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extern u32 reg_mode[7][7];
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15
gba_memory.c
15
gba_memory.c
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@ -318,6 +318,8 @@ dma_transfer_type dma[4];
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u8 *gamepak_buffers[32]; /* Pointers to malloc'ed blocks */
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u32 gamepak_buffer_count; /* Value between 1 and 32 */
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u32 gamepak_size; /* Size of the ROM in bytes */
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// We allocate in 1MB chunks.
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const unsigned gamepak_buffer_blocksize = 1024*1024;
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// LRU queue with the loaded blocks and what they map to
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struct {
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@ -2965,7 +2967,7 @@ void init_gamepak_buffer(void)
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gamepak_buffer_count = 0;
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while (gamepak_buffer_count < ROM_BUFFER_SIZE)
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{
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void *ptr = malloc(1024*1024);
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void *ptr = malloc(gamepak_buffer_blocksize);
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if (!ptr)
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break;
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gamepak_buffers[gamepak_buffer_count++] = (u8*)ptr;
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@ -2982,6 +2984,13 @@ void init_gamepak_buffer(void)
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gamepak_lru_tail = 32 * gamepak_buffer_count - 1;
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}
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bool gamepak_must_swap(void)
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{
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// Returns whether the current gamepak buffer is not big enough to hold
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// the full gamepak ROM. In these cases the device must swap.
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return gamepak_buffer_count * gamepak_buffer_blocksize < gamepak_size;
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}
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void init_memory(void)
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{
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u32 map_offset = 0;
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@ -3182,7 +3191,7 @@ static s32 load_gamepak_raw(const char *name)
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gamepak_size = (gamepak_size + 0x7FFF) & ~0x7FFF;
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// Load stuff in 1MB chunks
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u32 buf_blocks = (gamepak_size + 1024*1024-1) / (1024*1024);
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u32 buf_blocks = (gamepak_size + gamepak_buffer_blocksize-1) / (gamepak_buffer_blocksize);
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u32 rom_blocks = gamepak_size >> 15;
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u32 ldblks = buf_blocks < gamepak_buffer_count ?
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buf_blocks : gamepak_buffer_count;
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@ -3194,7 +3203,7 @@ static s32 load_gamepak_raw(const char *name)
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for (i = 0; i < ldblks; i++)
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{
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// Load 1MB chunk and map it
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filestream_read(gamepak_file_large, gamepak_buffers[i], 1024*1024);
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filestream_read(gamepak_file_large, gamepak_buffers[i], gamepak_buffer_blocksize);
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for (j = 0; j < 32 && i*32 + j < rom_blocks; j++)
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{
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u32 phyn = i*32 + j;
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@ -200,6 +200,7 @@ s32 load_bios(char *name);
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void update_backup(void);
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void init_memory(void);
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void init_gamepak_buffer(void);
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bool gamepak_must_swap(void);
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void memory_term(void);
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u8 *load_gamepak_page(u32 physical_index);
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2
main.c
2
main.c
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@ -102,7 +102,7 @@ void init_main(void)
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video_count = 960;
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#ifdef HAVE_DYNAREC
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init_emitter();
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init_emitter(gamepak_must_swap());
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init_caches();
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#endif
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}
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@ -2099,7 +2099,7 @@ typedef struct {
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static void emit_pmemld_stub(
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unsigned memop_number, const t_stub_meminfo *meminfo,
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bool signext, unsigned size,
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unsigned alignment, bool aligned,
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unsigned alignment, bool aligned, bool must_swap,
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u8 **tr_ptr)
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{
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u8 *translation_ptr = *tr_ptr;
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@ -2158,28 +2158,31 @@ static void emit_pmemld_stub(
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}
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if (region >= 8 && region <= 12) {
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u8 *jmppatch;
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// ROM area: might need to load the ROM on-demand
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mips_emit_srl(reg_rv, reg_a0, 15); // 32KB page number
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mips_emit_sll(reg_rv, reg_rv, 2); // (word indexed)
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mips_emit_addu(reg_rv, reg_rv, reg_base); // base + offset
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mips_emit_addu(reg_rv, reg_rv, reg_base); // base + offset
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mips_emit_lw(reg_rv, reg_rv, 0x8000); // base[offset-0x8000] is readmap ptr
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mips_emit_andi(reg_temp, reg_a0, memmask); // Get the lowest 15 bits [can go in delay slot]
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mips_emit_lw(reg_rv, reg_rv, 0x8000); // base[offset-0x8000]
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mips_emit_b_filler(bne, reg_rv, reg_zero, jmppatch); // if not null, can skip load page
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mips_emit_andi(reg_temp, reg_a0, memmask); // Get the lowest 15 bits [delay]
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if (must_swap) { // Do not emit if the ROM is fully loaded, save some cycles
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u8 *jmppatch;
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mips_emit_b_filler(bne, reg_rv, reg_zero, jmppatch); // if not null, can skip load page
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generate_swap_delay();
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// This code call the C routine to map the relevant ROM page
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emit_save_regs(aligned);
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mips_emit_sw(mips_reg_ra, reg_base, ReOff_SaveR3);
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extract_bits(reg_a0, reg_a0, 15, 10); // a0 = (addr >> 15) & 0x3ff
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genccall(&load_gamepak_page);
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mips_emit_sw(reg_temp, reg_base, ReOff_SaveR1);
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// This code call the C routine to map the relevant ROM page
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emit_save_regs(aligned);
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mips_emit_sw(mips_reg_ra, reg_base, ReOff_SaveR3);
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extract_bits(reg_a0, reg_a0, 15, 10); // a0 = (addr >> 15) & 0x3ff
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genccall(&load_gamepak_page); // Returns valid pointer in rv
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mips_emit_sw(reg_temp, reg_base, ReOff_SaveR1);
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mips_emit_lw(reg_temp, reg_base, ReOff_SaveR1);
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emit_restore_regs(aligned);
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mips_emit_lw(mips_reg_ra, reg_base, ReOff_SaveR3);
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mips_emit_lw(reg_temp, reg_base, ReOff_SaveR1);
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emit_restore_regs(aligned);
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mips_emit_lw(mips_reg_ra, reg_base, ReOff_SaveR3);
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generate_branch_patch_conditional(jmppatch, translation_ptr);
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generate_branch_patch_conditional(jmppatch - 4, translation_ptr);
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}
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// Now we can proceed to load, place addr in the right register
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mips_emit_addu(reg_rv, reg_rv, reg_temp);
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} else if (region == 14) {
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@ -2620,7 +2623,7 @@ typedef void (*sthldr_t)(
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typedef void (*ldhldr_t)(
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unsigned memop_number, const t_stub_meminfo *meminfo,
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bool signext, unsigned size,
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unsigned alignment, bool aligned,
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unsigned alignment, bool aligned, bool must_swap,
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u8 **tr_ptr);
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// Generates a patch handler for a given access size
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@ -2684,7 +2687,7 @@ static void emit_phand(
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// - memop patcher: Patches a memop whenever it accesses the wrong mem region
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// - mem stubs: There's stubs for load & store, and every memory region
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// and possible operand size and misaligment (+sign extensions)
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void init_emitter() {
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void init_emitter(bool must_swap) {
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int i;
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// Initialize memory to a debuggable state
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rom_cache_watermark = INITIAL_ROM_WATERMARK;
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@ -2756,20 +2759,20 @@ void init_emitter() {
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for (i = 0; i < sizeof(ldinfo)/sizeof(ldinfo[0]); i++) {
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ldhldr_t handler = (ldhldr_t)ldinfo[i].emitter;
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/* region info signext sz al isaligned */
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handler(0, &ldinfo[i], false, 0, 0, false, &translation_ptr); // ld u8
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handler(1, &ldinfo[i], true, 0, 0, false, &translation_ptr); // ld s8
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handler(0, &ldinfo[i], false, 0, 0, false, must_swap, &translation_ptr); // ld u8
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handler(1, &ldinfo[i], true, 0, 0, false, must_swap, &translation_ptr); // ld s8
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handler(2, &ldinfo[i], false, 1, 0, false, &translation_ptr); // ld u16
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handler(3, &ldinfo[i], false, 1, 1, false, &translation_ptr); // ld u16u1
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handler(4, &ldinfo[i], true, 1, 0, false, &translation_ptr); // ld s16
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handler(5, &ldinfo[i], true, 1, 1, false, &translation_ptr); // ld s16u1
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handler(2, &ldinfo[i], false, 1, 0, false, must_swap, &translation_ptr); // ld u16
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handler(3, &ldinfo[i], false, 1, 1, false, must_swap, &translation_ptr); // ld u16u1
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handler(4, &ldinfo[i], true, 1, 0, false, must_swap, &translation_ptr); // ld s16
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handler(5, &ldinfo[i], true, 1, 1, false, must_swap, &translation_ptr); // ld s16u1
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handler(6, &ldinfo[i], false, 2, 0, false, &translation_ptr); // ld u32
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handler(7, &ldinfo[i], false, 2, 1, false, &translation_ptr); // ld u32u1
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handler(8, &ldinfo[i], false, 2, 2, false, &translation_ptr); // ld u32u2
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handler(9, &ldinfo[i], false, 2, 3, false, &translation_ptr); // ld u32u3
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handler(6, &ldinfo[i], false, 2, 0, false, must_swap, &translation_ptr); // ld u32
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handler(7, &ldinfo[i], false, 2, 1, false, must_swap, &translation_ptr); // ld u32u1
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handler(8, &ldinfo[i], false, 2, 2, false, must_swap, &translation_ptr); // ld u32u2
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handler(9, &ldinfo[i], false, 2, 3, false, must_swap, &translation_ptr); // ld u32u3
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handler(10,&ldinfo[i], false, 2, 0, true, &translation_ptr); // aligned ld u32
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handler(10,&ldinfo[i], false, 2, 0, true, must_swap, &translation_ptr); // aligned ld u32
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}
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const t_stub_meminfo stinfo [] = {
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@ -2260,7 +2260,7 @@ static void function_cc execute_swi(u32 pc)
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extern void* x86_table_data[9][16];
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extern void* x86_table_info[9][16];
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void init_emitter(void) {
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void init_emitter(bool must_swap) {
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memcpy(x86_table_info, x86_table_data, sizeof(x86_table_data));
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rom_cache_watermark = INITIAL_ROM_WATERMARK;
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@ -38,6 +38,7 @@ _##symbol:
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// otherwise), where we use our own convention call. However calls to C code must
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// follow the calling convention. x86 is built with regparm=2 to avoid stack usage.
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#if defined(__x86_64__) || defined(__amd64__)
|
||||
#define JUMP_CX_ZERO jrcxz
|
||||
#define ADDR_TYPE .quad
|
||||
#define ADDR_SIZE_BYTES 8
|
||||
#define STACK_REG %rsp
|
||||
|
|
@ -62,6 +63,7 @@ _##symbol:
|
|||
#endif
|
||||
#define SETUP_ARGS mov %eax, CARG1_REG; mov %edx, CARG2_REG;
|
||||
#else
|
||||
#define JUMP_CX_ZERO jecxz
|
||||
#define ADDR_TYPE .long
|
||||
#define ADDR_SIZE_BYTES 4
|
||||
#define STACK_REG %esp
|
||||
|
|
@ -422,13 +424,14 @@ ext_load_io##rtype: ;\
|
|||
ret ;\
|
||||
;\
|
||||
ext_load_rom##rtype: ;\
|
||||
mov %eax, %ecx /* ecx = address */ ;\
|
||||
shr $15, %ecx /* ecx = address >> 15 */ ;\
|
||||
mov %eax, %edx /* edx = address */ ;\
|
||||
shr $15, %edx /* edx = address >> 15 */ ;\
|
||||
/* Read rdmap pointer */ ;\
|
||||
mov RDMAP_OFF(REG_BASE, FULLREG(cx), ADDR_SIZE_BYTES), FULLREG(dx) ;\
|
||||
mov %eax, %ecx /* ecx = address */ ;\
|
||||
and $0x7FFF, %ecx /* ecx = address LSB */ ;\
|
||||
movop (FULLREG(dx), FULLREG(cx)), %eax /* Read mem */ ;\
|
||||
mov RDMAP_OFF(REG_BASE, FULLREG(dx), ADDR_SIZE_BYTES), FULLREG(cx) ;\
|
||||
JUMP_CX_ZERO ext_load_slow##rtype /* page not loaded, slow */ ;\
|
||||
mov %eax, %edx /* edx = address */ ;\
|
||||
and $0x7FFF, %edx /* edx = address LSB */ ;\
|
||||
movop (FULLREG(cx), FULLREG(dx)), %eax /* Read mem */ ;\
|
||||
ret ;\
|
||||
;\
|
||||
ext_load_slow##rtype: ;\
|
||||
|
|
|
|||
Loading…
Reference in New Issue