ff510e7f7a
Seems that using the __atribute__ magic for sections is not the best way of doing this, since it injects some default atributtes that collide with the user defined ones. Using assembly is far easier in this case. Reworked definitions a bit to make it easier to import from assembly. Also wrapped stuff around macros for easy and less verbose implementation of the symbol prefix issue.
188 lines
5 KiB
C
188 lines
5 KiB
C
/* gameplaySP
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*
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* Copyright (C) 2006 Exophase <exophase@gmail.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef CPU_H
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#define CPU_H
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#include "gpsp_config.h"
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// System mode and user mode are represented as the same here
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typedef enum
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{
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MODE_USER,
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MODE_IRQ,
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MODE_FIQ,
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MODE_SUPERVISOR,
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MODE_ABORT,
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MODE_UNDEFINED,
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MODE_INVALID
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} cpu_mode_type;
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typedef enum
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{
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CPU_ALERT_NONE,
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CPU_ALERT_HALT,
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CPU_ALERT_SMC,
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CPU_ALERT_IRQ
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} cpu_alert_type;
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typedef enum
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{
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CPU_ACTIVE,
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CPU_HALT,
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CPU_STOP
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} cpu_halt_type;
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typedef enum
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{
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IRQ_NONE = 0x0000,
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IRQ_VBLANK = 0x0001,
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IRQ_HBLANK = 0x0002,
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IRQ_VCOUNT = 0x0004,
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IRQ_TIMER0 = 0x0008,
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IRQ_TIMER1 = 0x0010,
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IRQ_TIMER2 = 0x0020,
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IRQ_TIMER3 = 0x0040,
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IRQ_SERIAL = 0x0080,
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IRQ_DMA0 = 0x0100,
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IRQ_DMA1 = 0x0200,
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IRQ_DMA2 = 0x0400,
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IRQ_DMA3 = 0x0800,
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IRQ_KEYPAD = 0x1000,
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IRQ_GAMEPAK = 0x2000
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} irq_type;
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typedef enum
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{
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REG_SP = 13,
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REG_LR = 14,
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REG_PC = 15,
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REG_N_FLAG = 16,
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REG_Z_FLAG = 17,
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REG_C_FLAG = 18,
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REG_V_FLAG = 19,
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REG_CPSR = 20,
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REG_SAVE = 21,
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REG_SAVE2 = 22,
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REG_SAVE3 = 23,
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CPU_MODE = 29,
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CPU_HALT_STATE = 30,
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CHANGED_PC_STATUS = 31,
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COMPLETED_FRAME = 32
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} ext_reg_numbers;
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typedef enum
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{
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TRANSLATION_REGION_RAM,
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TRANSLATION_REGION_ROM,
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} translation_region_type;
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extern u32 instruction_count;
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extern u32 last_instruction;
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void execute_arm(u32 cycles);
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void raise_interrupt(irq_type irq_raised);
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void set_cpu_mode(cpu_mode_type new_mode);
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u32 function_cc execute_load_u8(u32 address);
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u32 function_cc execute_load_u16(u32 address);
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u32 function_cc execute_load_u32(u32 address);
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u32 function_cc execute_load_s8(u32 address);
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u32 function_cc execute_load_s16(u32 address);
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void function_cc execute_store_u8(u32 address, u32 source);
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void function_cc execute_store_u16(u32 address, u32 source);
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void function_cc execute_store_u32(u32 address, u32 source);
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u32 function_cc execute_arm_translate(u32 cycles);
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void init_translater(void);
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void cpu_write_savestate(void);
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void cpu_read_savestate(void);
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u8 function_cc *block_lookup_address_arm(u32 pc);
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u8 function_cc *block_lookup_address_thumb(u32 pc);
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u8 function_cc *block_lookup_address_dual(u32 pc);
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s32 translate_block_arm(u32 pc, translation_region_type translation_region,
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u32 smc_enable);
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s32 translate_block_thumb(u32 pc, translation_region_type translation_region,
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u32 smc_enable);
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#if defined(HAVE_MMAP)
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extern u8* rom_translation_cache;
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extern u8* ram_translation_cache;
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#elif defined(_3DS)
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#define rom_translation_cache ((u8*)0x02000000 - ROM_TRANSLATION_CACHE_SIZE)
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#define ram_translation_cache (rom_translation_cache - RAM_TRANSLATION_CACHE_SIZE)
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extern u8* rom_translation_cache_ptr;
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extern u8* ram_translation_cache_ptr;
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#elif defined(VITA)
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extern u8* rom_translation_cache;
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extern u8* ram_translation_cache;
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extern int sceBlock;
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#else
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extern u8 rom_translation_cache[ROM_TRANSLATION_CACHE_SIZE];
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extern u8 ram_translation_cache[RAM_TRANSLATION_CACHE_SIZE];
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#endif
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extern u32 stub_arena[STUB_ARENA_SIZE / 4];
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extern u8 *rom_translation_ptr;
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extern u8 *ram_translation_ptr;
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#define MAX_TRANSLATION_GATES 8
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extern u32 idle_loop_target_pc;
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extern u32 iwram_stack_optimize;
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extern u32 direct_map_vram;
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extern u32 translation_gate_targets;
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extern u32 translation_gate_target_pc[MAX_TRANSLATION_GATES];
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extern u32 in_interrupt;
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extern u32 *rom_branch_hash[ROM_BRANCH_HASH_SIZE];
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void flush_translation_cache_rom(void);
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void flush_translation_cache_ram(void);
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void dump_translation_cache(void);
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void wipe_caches(void);
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extern u32 reg_mode[7][7];
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extern u32 spsr[6];
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extern u32 cpu_modes[32];
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extern const u32 psr_masks[16];
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extern u32 memory_region_access_read_u8[16];
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extern u32 memory_region_access_read_s8[16];
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extern u32 memory_region_access_read_u16[16];
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extern u32 memory_region_access_read_s16[16];
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extern u32 memory_region_access_read_u32[16];
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extern u32 memory_region_access_write_u8[16];
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extern u32 memory_region_access_write_u16[16];
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extern u32 memory_region_access_write_u32[16];
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extern u32 memory_reads_u8;
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extern u32 memory_reads_s8;
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extern u32 memory_reads_u16;
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extern u32 memory_reads_s16;
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extern u32 memory_reads_u32;
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extern u32 memory_writes_u8;
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extern u32 memory_writes_u16;
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extern u32 memory_writes_u32;
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void init_cpu(void);
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void move_reg();
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#endif
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