Remove CHANGED_PC_STATUS, simplify update flow
This commit is contained in:
parent
64b19d1301
commit
eb50c15b1c
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@ -57,14 +57,9 @@ _##symbol:
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#define REG_Z_FLAG (21 * 4)
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#define REG_Z_FLAG (21 * 4)
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#define REG_C_FLAG (22 * 4)
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#define REG_C_FLAG (22 * 4)
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#define REG_V_FLAG (23 * 4)
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#define REG_V_FLAG (23 * 4)
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#define CHANGED_PC_STATUS (24 * 4)
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#define COMPLETED_FRAME (24 * 4)
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#define COMPLETED_FRAME (25 * 4)
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#define OAM_UPDATED (25 * 4)
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#define OAM_UPDATED (26 * 4)
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#define REG_SAVE (26 * 4)
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#define REG_SAVE (27 * 4)
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#define REG_SAVE2 (28 * 4)
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#define REG_SAVE3 (29 * 4)
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#define REG_SAVE4 (30 * 4)
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#define REG_SAVE5 (31 * 4)
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#define CPU_ALERT_HALT_B 0
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#define CPU_ALERT_HALT_B 0
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#define CPU_ALERT_SMC_B 1
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#define CPU_ALERT_SMC_B 1
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@ -162,11 +157,10 @@ defsymbl(a64_update_gba)
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cbnz w1, return_to_main
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cbnz w1, return_to_main
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// Resume execution (perhaps from a new PC)
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// Resume execution (perhaps from a new PC)
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mov reg_cycles, w0 // load new cycle count
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and reg_cycles, w0, 0x7fff // load new cycle count
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extract_flags(w2) // reload flag cache bits
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extract_flags(w2) // reload flag cache bits
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ldr w0, [reg_base, #CHANGED_PC_STATUS] // see if PC has change
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tbnz w0, #31, 1f // check if PC changed
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cbnz w0, 1f // go start from new PC
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ldr lr, [reg_base, #REG_SAVE] // Restore return point
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ldr lr, [reg_base, #REG_SAVE] // Restore return point
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load_registers() // reload registers
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load_registers() // reload registers
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@ -712,7 +706,7 @@ write_epilogue:
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alert_loop:
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alert_loop:
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mov w0, reg_cycles // load remaining cycles
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mov w0, reg_cycles // load remaining cycles
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bl update_gba // update GBA until CPU isn't halted
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bl update_gba // update GBA until CPU isn't halted
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mov reg_cycles, w0 // load new cycle count
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and reg_cycles, w0, 0x7fff // load new cycle count
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ldr w1, [reg_base, #COMPLETED_FRAME] // Check whether a frame was completed
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ldr w1, [reg_base, #COMPLETED_FRAME] // Check whether a frame was completed
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cbnz w1, return_to_main // and return to caller function.
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cbnz w1, return_to_main // and return to caller function.
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@ -39,14 +39,8 @@ _##symbol:
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#define REG_Z_FLAG (21 * 4)
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#define REG_Z_FLAG (21 * 4)
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#define REG_C_FLAG (22 * 4)
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#define REG_C_FLAG (22 * 4)
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#define REG_V_FLAG (23 * 4)
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#define REG_V_FLAG (23 * 4)
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#define CHANGED_PC_STATUS (24 * 4)
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#define COMPLETED_FRAME (24 * 4)
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#define COMPLETED_FRAME (25 * 4)
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#define OAM_UPDATED (25 * 4)
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#define OAM_UPDATED (26 * 4)
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#define REG_SAVE (27 * 4)
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#define REG_SAVE2 (28 * 4)
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#define REG_SAVE3 (29 * 4)
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#define REG_SAVE4 (30 * 4)
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#define REG_SAVE5 (31 * 4)
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#define CPU_ALERT_HALT (1 << 0)
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#define CPU_ALERT_HALT (1 << 0)
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#define CPU_ALERT_SMC (1 << 1)
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#define CPU_ALERT_SMC (1 << 1)
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@ -205,10 +199,10 @@ defsymbl(arm_update_gba_##name) ;\
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cmp r1, #0 ;\
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cmp r1, #0 ;\
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bne return_to_main ;\
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bne return_to_main ;\
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;\
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;\
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mvn reg_cycles, r0 /* load new cycle count */;\
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bic reg_cycles, r0, #0x80000000 /* clear MSB, not part of count */;\
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mvn reg_cycles, reg_cycles /* we count negative to zero */;\
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;\
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;\
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ldr r0, [reg_base, #CHANGED_PC_STATUS] /* load PC changed status */;\
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tst r0, #0x80000000 /* set if PC changed */;\
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cmp r0, #0 /* see if PC has changed */;\
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bne 1f /* go jump/translate */;\
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bne 1f /* go jump/translate */;\
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;\
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;\
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load_registers_##mode() /* reload registers */;\
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load_registers_##mode() /* reload registers */;\
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@ -698,6 +692,7 @@ write_epilogue:
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alert_loop:
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alert_loop:
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call_c_function(update_gba) @ update GBA until CPU isn't halted
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call_c_function(update_gba) @ update GBA until CPU isn't halted
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bic r0, r0, #0x80000000 @ clear MSB, not part of count
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ldr r1, [reg_base, #COMPLETED_FRAME] @ Check whether a frame was completed
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ldr r1, [reg_base, #COMPLETED_FRAME] @ Check whether a frame was completed
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cmp r1, #0
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cmp r1, #0
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12
cpu.c
12
cpu.c
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@ -1484,7 +1484,7 @@ cpu_alert_type check_interrupt() {
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// Checks for pending IRQs and raises them. This changes the CPU mode
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// Checks for pending IRQs and raises them. This changes the CPU mode
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// which means that it must be called with a valid CPU state.
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// which means that it must be called with a valid CPU state.
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void check_and_raise_interrupts()
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u32 check_and_raise_interrupts()
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{
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{
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// Check any IRQ flag pending, IME and CPSR-IRQ enabled
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// Check any IRQ flag pending, IME and CPSR-IRQ enabled
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if (cpu_has_interrupt())
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if (cpu_has_interrupt())
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@ -1500,8 +1500,9 @@ void check_and_raise_interrupts()
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set_cpu_mode(MODE_IRQ);
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set_cpu_mode(MODE_IRQ);
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reg[CPU_HALT_STATE] = CPU_ACTIVE;
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reg[CPU_HALT_STATE] = CPU_ACTIVE;
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reg[CHANGED_PC_STATUS] = 1;
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return 1;
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}
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}
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return 0;
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}
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}
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// This function marks a pending interrupt but does not raise it.
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// This function marks a pending interrupt but does not raise it.
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@ -1560,7 +1561,7 @@ void execute_arm(u32 cycles)
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{
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{
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/* Do not execute until CPU is active */
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/* Do not execute until CPU is active */
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while(reg[CPU_HALT_STATE] != CPU_ACTIVE) {
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while(reg[CPU_HALT_STATE] != CPU_ACTIVE) {
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cycles_remaining = update_gba(cycles_remaining);
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cycles_remaining = update_gba_cycles(cycles_remaining);
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if (reg[COMPLETED_FRAME])
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if (reg[COMPLETED_FRAME])
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return;
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return;
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@ -3154,7 +3155,7 @@ skip_instruction:
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} while(cycles_remaining > 0);
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} while(cycles_remaining > 0);
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collapse_flags();
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collapse_flags();
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cycles_remaining = update_gba(cycles_remaining);
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cycles_remaining = update_gba_cycles(cycles_remaining);
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if (reg[COMPLETED_FRAME])
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if (reg[COMPLETED_FRAME])
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return;
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return;
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continue;
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continue;
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@ -3671,7 +3672,7 @@ thumb_loop:
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} while(cycles_remaining > 0);
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} while(cycles_remaining > 0);
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collapse_flags();
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collapse_flags();
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cycles_remaining = update_gba(cycles_remaining);
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cycles_remaining = update_gba_cycles(cycles_remaining);
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if (reg[COMPLETED_FRAME])
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if (reg[COMPLETED_FRAME])
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return;
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return;
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continue;
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continue;
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@ -3692,7 +3693,6 @@ void init_cpu(void)
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spsr[i] = 0x00000010;
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spsr[i] = 0x00000010;
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reg[CPU_HALT_STATE] = CPU_ACTIVE;
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reg[CPU_HALT_STATE] = CPU_ACTIVE;
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reg[CHANGED_PC_STATUS] = 0;
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if (selected_boot_mode == boot_game) {
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if (selected_boot_mode == boot_game) {
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reg[REG_SP] = 0x03007F00;
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reg[REG_SP] = 0x03007F00;
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18
cpu.h
18
cpu.h
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@ -91,14 +91,14 @@ typedef enum
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REG_Z_FLAG = 21,
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REG_Z_FLAG = 21,
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REG_C_FLAG = 22,
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REG_C_FLAG = 22,
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REG_V_FLAG = 23,
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REG_V_FLAG = 23,
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CHANGED_PC_STATUS = 24,
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COMPLETED_FRAME = 24,
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COMPLETED_FRAME = 25,
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OAM_UPDATED = 25,
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OAM_UPDATED = 26,
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REG_SAVE = 26,
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REG_SAVE = 27,
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REG_SAVE2 = 27,
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REG_SAVE2 = 28,
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REG_SAVE3 = 28,
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REG_SAVE3 = 29,
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REG_SAVE4 = 29,
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REG_SAVE4 = 30,
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REG_SAVE5 = 30,
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REG_SAVE5 = 31,
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REG_SAVE6 = 31,
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/* Machine defined storage */
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/* Machine defined storage */
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REG_USERDEF = 32,
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REG_USERDEF = 32,
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@ -109,7 +109,7 @@ typedef enum
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extern u32 instruction_count;
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extern u32 instruction_count;
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void execute_arm(u32 cycles);
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void execute_arm(u32 cycles);
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void check_and_raise_interrupts(void);
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u32 check_and_raise_interrupts(void);
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cpu_alert_type check_interrupt(void);
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cpu_alert_type check_interrupt(void);
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cpu_alert_type flag_interrupt(irq_type irq_raised);
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cpu_alert_type flag_interrupt(irq_type irq_raised);
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void set_cpu_mode(cpu_mode_type new_mode);
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void set_cpu_mode(cpu_mode_type new_mode);
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7
main.c
7
main.c
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@ -109,6 +109,7 @@ void init_main(void)
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u32 function_cc update_gba(int remaining_cycles)
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u32 function_cc update_gba(int remaining_cycles)
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{
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{
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u32 changed_pc = 0;
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irq_type irq_raised = IRQ_NONE;
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irq_type irq_raised = IRQ_NONE;
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int dma_cycles;
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int dma_cycles;
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trace_update_gba(remaining_cycles);
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trace_update_gba(remaining_cycles);
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@ -124,7 +125,6 @@ u32 function_cc update_gba(int remaining_cycles)
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cpu_ticks += completed_cycles;
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cpu_ticks += completed_cycles;
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remaining_cycles = 0;
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remaining_cycles = 0;
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reg[CHANGED_PC_STATUS] = 0;
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reg[COMPLETED_FRAME] = 0;
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reg[COMPLETED_FRAME] = 0;
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if(gbc_sound_update)
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if(gbc_sound_update)
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@ -247,7 +247,8 @@ u32 function_cc update_gba(int remaining_cycles)
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flag_interrupt(irq_raised);
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flag_interrupt(irq_raised);
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// Raise any pending interrupts. This changes the CPU mode.
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// Raise any pending interrupts. This changes the CPU mode.
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check_and_raise_interrupts();
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if (check_and_raise_interrupts())
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changed_pc = 0x80000000;
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execute_cycles = MAX(video_count, 0);
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execute_cycles = MAX(video_count, 0);
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@ -263,7 +264,7 @@ u32 function_cc update_gba(int remaining_cycles)
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dma_cycles = MIN(64, dma_cycles);
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dma_cycles = MIN(64, dma_cycles);
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dma_cycles = MIN(execute_cycles, dma_cycles);
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dma_cycles = MIN(execute_cycles, dma_cycles);
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return execute_cycles - dma_cycles;
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return (execute_cycles - dma_cycles) | changed_pc;
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}
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}
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void reset_gba(void)
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void reset_gba(void)
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1
main.h
1
main.h
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@ -76,6 +76,7 @@ extern u32 flush_ram_count;
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extern char main_path[512];
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extern char main_path[512];
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extern char save_path[512];
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extern char save_path[512];
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#define update_gba_cycles(c) (update_gba(c) & 0x7FFF)
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u32 function_cc update_gba(int remaining_cycles);
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u32 function_cc update_gba(int remaining_cycles);
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void reset_gba(void);
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void reset_gba(void);
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@ -1972,7 +1972,7 @@ u32 execute_store_cpsr_body(u32 _cpsr, u32 address)
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#define ReOff_SaveR2 (REG_SAVE2 * 4)
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#define ReOff_SaveR2 (REG_SAVE2 * 4)
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#define ReOff_SaveR3 (REG_SAVE3 * 4)
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#define ReOff_SaveR3 (REG_SAVE3 * 4)
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#define ReOff_OamUpd (OAM_UPDATED*4) // OAM_UPDATED
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#define ReOff_OamUpd (OAM_UPDATED*4) // OAM_UPDATED
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#define ReOff_GP_Save (REG_SAVE4 * 4) // GP_SAVE
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#define ReOff_GP_Save (REG_SAVE5 * 4) // GP_SAVE
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// Saves all regs to their right slot and loads gp
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// Saves all regs to their right slot and loads gp
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#define emit_save_regs(save_a2) { \
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#define emit_save_regs(save_a2) { \
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@ -104,12 +104,12 @@ symbol:
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.equ REG_Z_FLAG, (21 * 4)
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.equ REG_Z_FLAG, (21 * 4)
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.equ REG_C_FLAG, (22 * 4)
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.equ REG_C_FLAG, (22 * 4)
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.equ REG_V_FLAG, (23 * 4)
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.equ REG_V_FLAG, (23 * 4)
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.equ CHANGED_PC_STATUS, (24 * 4)
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.equ COMPLETED_FRAME, (24 * 4)
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.equ COMPLETED_FRAME, (25 * 4)
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.equ OAM_UPDATED, (25 * 4)
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.equ OAM_UPDATED, (26 * 4)
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.equ REG_SAVE, (26 * 4)
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.equ REG_SAVE, (27 * 4)
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.equ REG_SAVE2, (27 * 4)
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.equ REG_SAVE2, (28 * 4)
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.equ REG_SAVE3, (28 * 4)
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.equ REG_SAVE3, (29 * 4)
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.equ REG_SAVE4, (29 * 4)
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.equ GP_SAVE, (30 * 4)
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.equ GP_SAVE, (30 * 4)
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.equ GP_SAVE_HI, (31 * 4)
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.equ GP_SAVE_HI, (31 * 4)
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@ -247,21 +247,17 @@ defsymbl(mips_update_gba)
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sw $ra, REG_SAVE2($16) # save return addr
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sw $ra, REG_SAVE2($16) # save return addr
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collapse_flags # update cpsr
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collapse_flags # update cpsr
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save_registers # save registers
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save_registers # save registers
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sw $0, CHANGED_PC_STATUS($16)
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move $4, reg_cycles # Remaining cycles as asg0
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move $4, reg_cycles # Remaining cycles as asg0
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cfncall update_gba, 0 # process the next event
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cfncall update_gba, 0 # process the next event
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lw $1, COMPLETED_FRAME($16) # Check whether we completed a frame
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lw $1, COMPLETED_FRAME($16) # Check whether we completed a frame
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bne $1, $0, return_to_main # Return to main thread now
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bne $1, $0, return_to_main # Return to main thread now
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move reg_cycles, $2 # update new cycle count (ret value)
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and reg_cycles, $2, 0x7FFF # update new cycle count (ret value)
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bltz $2, lookup_pc
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lw $ra, REG_SAVE2($16) # restore return address
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lw $ra, REG_SAVE2($16) # restore return address
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lw $1, CHANGED_PC_STATUS($16)
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bne $1, $0, lookup_pc
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nop
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restore_registers
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restore_registers
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jr $ra # if not, go back to caller
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jr $ra # if not, go back to caller
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@ -347,7 +343,7 @@ defsymbl(write_io_epilogue)
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alert_loop:
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alert_loop:
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move $4, reg_cycles # Remaining cycles as asg0
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move $4, reg_cycles # Remaining cycles as asg0
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cfncall update_gba, 0 # process the next event
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cfncall update_gba, 0 # process the next event
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move reg_cycles, $2 # update new cycle count (ret value)
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and reg_cycles, $2, 0x7FFF # update new cycle count (ret value)
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lw $1, COMPLETED_FRAME($16) # Check whether we completed a frame
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lw $1, COMPLETED_FRAME($16) # Check whether we completed a frame
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bne $1, $0, return_to_main # Return to main thread now
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bne $1, $0, return_to_main # Return to main thread now
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@ -107,7 +107,6 @@ bool gba_load_state(const void* src)
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#endif
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#endif
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instruction_count = 0;
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instruction_count = 0;
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reg[CHANGED_PC_STATUS] = 1;
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reg[COMPLETED_FRAME] = 0;
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reg[COMPLETED_FRAME] = 0;
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reg[OAM_UPDATED] = 1;
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reg[OAM_UPDATED] = 1;
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gbc_sound_update = 1;
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gbc_sound_update = 1;
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@ -95,14 +95,9 @@ _##symbol:
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.equ REG_Z_FLAG, (21 * 4)
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.equ REG_Z_FLAG, (21 * 4)
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.equ REG_C_FLAG, (22 * 4)
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.equ REG_C_FLAG, (22 * 4)
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.equ REG_V_FLAG, (23 * 4)
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.equ REG_V_FLAG, (23 * 4)
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.equ CHANGED_PC_STATUS, (24 * 4)
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.equ COMPLETED_FRAME, (24 * 4)
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.equ COMPLETED_FRAME, (25 * 4)
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.equ OAM_UPDATED, (25 * 4)
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.equ OAM_UPDATED, (26 * 4)
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.equ REG_SAVE, (26 * 4)
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.equ REG_SAVE, (27 * 4)
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.equ REG_SAVE2, (28 * 4)
|
|
||||||
.equ REG_SAVE3, (29 * 4)
|
|
||||||
.equ REG_SAVE4, (30 * 4)
|
|
||||||
.equ REG_SAVE5, (31 * 4)
|
|
||||||
|
|
||||||
.equ load_u8_tbl, -(9 * 16 * ADDR_SIZE_BYTES)
|
.equ load_u8_tbl, -(9 * 16 * ADDR_SIZE_BYTES)
|
||||||
.equ load_s8_tbl, -(8 * 16 * ADDR_SIZE_BYTES)
|
.equ load_s8_tbl, -(8 * 16 * ADDR_SIZE_BYTES)
|
||||||
|
@ -176,15 +171,16 @@ defsymbl(x86_update_gba)
|
||||||
mov REG_CYCLES, CARG1_REG # Load remaining cycles as arg0
|
mov REG_CYCLES, CARG1_REG # Load remaining cycles as arg0
|
||||||
CALL_FUNC(update_gba) # process the next event
|
CALL_FUNC(update_gba) # process the next event
|
||||||
mov %eax, REG_CYCLES # new cycle count
|
mov %eax, REG_CYCLES # new cycle count
|
||||||
|
and $0x7fff, REG_CYCLES # in the lowest bits
|
||||||
|
|
||||||
# did we just complete a frame? go back to main then
|
# did we just complete a frame? go back to main then
|
||||||
cmpl $0, COMPLETED_FRAME(REG_BASE)
|
cmpl $0, COMPLETED_FRAME(REG_BASE)
|
||||||
jne return_to_main
|
jne return_to_main
|
||||||
|
|
||||||
# did the PC change?
|
# did the PC change?
|
||||||
cmpl $1, CHANGED_PC_STATUS(REG_BASE)
|
test %eax, %eax # Bit 31 set, means need to re-fetch
|
||||||
je lookup_pc
|
js lookup_pc
|
||||||
ret # if not, go back to caller
|
ret # otherwise, go back to caller
|
||||||
|
|
||||||
# Perform this on an indirect branch that will definitely go to
|
# Perform this on an indirect branch that will definitely go to
|
||||||
# ARM code, IE anything that changes the PC in ARM mode except
|
# ARM code, IE anything that changes the PC in ARM mode except
|
||||||
|
@ -269,6 +265,7 @@ alert_loop:
|
||||||
mov REG_CYCLES, CARG1_REG # Load remaining cycles as arg0
|
mov REG_CYCLES, CARG1_REG # Load remaining cycles as arg0
|
||||||
CALL_FUNC(update_gba) # process the next event
|
CALL_FUNC(update_gba) # process the next event
|
||||||
mov %eax, REG_CYCLES # load new cycle count
|
mov %eax, REG_CYCLES # load new cycle count
|
||||||
|
and $0x7fff, REG_CYCLES # (only lowest bits)
|
||||||
|
|
||||||
# did we just complete a frame? go back to main then
|
# did we just complete a frame? go back to main then
|
||||||
cmpl $0, COMPLETED_FRAME(REG_BASE)
|
cmpl $0, COMPLETED_FRAME(REG_BASE)
|
||||||
|
@ -502,7 +499,6 @@ defsymbl(execute_store_cpsr)
|
||||||
smc_write:
|
smc_write:
|
||||||
CALL_FUNC(flush_translation_cache_ram)
|
CALL_FUNC(flush_translation_cache_ram)
|
||||||
lookup_pc:
|
lookup_pc:
|
||||||
movl $0, CHANGED_PC_STATUS(REG_BASE) # Lookup new block and jump to it
|
|
||||||
mov REG_PC(REG_BASE), CARG1_REG # Load PC as argument0
|
mov REG_PC(REG_BASE), CARG1_REG # Load PC as argument0
|
||||||
testl $0x20, REG_CPSR(REG_BASE)
|
testl $0x20, REG_CPSR(REG_BASE)
|
||||||
jz 1f
|
jz 1f
|
||||||
|
|
Loading…
Reference in New Issue