Some small cleanup to make the code more C++ conformant

This commit is contained in:
David Guillen Fandos 2021-07-11 13:35:21 +02:00
parent 3144d9e277
commit c9421e6929
10 changed files with 231 additions and 242 deletions

11
cpu.c
View file

@ -1544,17 +1544,6 @@ u32 reg_mode[7][7];
// ARM/Thumb mode is stored in the flags directly, this is simpler than // ARM/Thumb mode is stored in the flags directly, this is simpler than
// shadowing it since it has a constant 1bit represenation. // shadowing it since it has a constant 1bit represenation.
char *reg_names[16] =
{
" r0", " r1", " r2", " r3", " r4", " r5", " r6", " r7",
" r8", " r9", "r10", " fp", " ip", " sp", " lr", " pc"
};
char *cpu_mode_names[] =
{
"user", "irq", "fiq", "svsr", "abrt", "undf", "invd"
};
u32 instruction_count = 0; u32 instruction_count = 0;
u32 output_field = 0; u32 output_field = 0;

62
cpu.h
View file

@ -24,23 +24,22 @@
// System mode and user mode are represented as the same here // System mode and user mode are represented as the same here
typedef enum typedef u32 cpu_mode_type;
{
MODE_USER, #define MODE_USER 0x0
MODE_IRQ, #define MODE_IRQ 0x1
MODE_FIQ, #define MODE_FIQ 0x2
MODE_SUPERVISOR, #define MODE_SUPERVISOR 0x3
MODE_ABORT, #define MODE_ABORT 0x4
MODE_UNDEFINED, #define MODE_UNDEFINED 0x5
MODE_INVALID #define MODE_INVALID 0x6
} cpu_mode_type;
typedef enum typedef enum
{ {
CPU_ALERT_NONE, CPU_ALERT_NONE = 0,
CPU_ALERT_HALT, CPU_ALERT_HALT = 1,
CPU_ALERT_SMC, CPU_ALERT_SMC = 2,
CPU_ALERT_IRQ CPU_ALERT_IRQ = 3
} cpu_alert_type; } cpu_alert_type;
typedef enum typedef enum
@ -50,24 +49,23 @@ typedef enum
CPU_STOP CPU_STOP
} cpu_halt_type; } cpu_halt_type;
typedef enum typedef u16 irq_type;
{
IRQ_NONE = 0x0000, #define IRQ_NONE 0x0000
IRQ_VBLANK = 0x0001, #define IRQ_VBLANK 0x0001
IRQ_HBLANK = 0x0002, #define IRQ_HBLANK 0x0002
IRQ_VCOUNT = 0x0004, #define IRQ_VCOUNT 0x0004
IRQ_TIMER0 = 0x0008, #define IRQ_TIMER0 0x0008
IRQ_TIMER1 = 0x0010, #define IRQ_TIMER1 0x0010
IRQ_TIMER2 = 0x0020, #define IRQ_TIMER2 0x0020
IRQ_TIMER3 = 0x0040, #define IRQ_TIMER3 0x0040
IRQ_SERIAL = 0x0080, #define IRQ_SERIAL 0x0080
IRQ_DMA0 = 0x0100, #define IRQ_DMA0 0x0100
IRQ_DMA1 = 0x0200, #define IRQ_DMA1 0x0200
IRQ_DMA2 = 0x0400, #define IRQ_DMA2 0x0400
IRQ_DMA3 = 0x0800, #define IRQ_DMA3 0x0800
IRQ_KEYPAD = 0x1000, #define IRQ_KEYPAD 0x1000
IRQ_GAMEPAK = 0x2000 #define IRQ_GAMEPAK 0x2000
} irq_type;
typedef enum typedef enum
{ {

View file

@ -153,22 +153,26 @@ static void gbc_trigger_sound(u32 value)
{ {
gbc_sound_master_volume_right = value & 0x07; gbc_sound_master_volume_right = value & 0x07;
gbc_sound_master_volume_left = (value >> 4) & 0x07; gbc_sound_master_volume_left = (value >> 4) & 0x07;
gbc_sound_channel[channel].status = gbc_sound_channel[channel].status = (gbc_sound_status_type)
((value >> (channel + 8)) & 0x01) | ((value >> (channel + 11)) & 0x03); (((value >> (channel + 8)) & 0x1) | ((value >> (channel + 11)) & 0x3));
} }
write_ioreg(REG_SOUNDCNT_L, value); write_ioreg(REG_SOUNDCNT_L, value);
} }
#define trigger_sound() \ #define trigger_sound() \
{ \ { \
timer[0].direct_sound_channels = (((value >> 10) & 0x01) == 0) | \ timer[0].direct_sound_channels = (timer_ds_channel_type) \
((((value >> 14) & 0x01) == 0) << 1); \ ((((value >> 10) & 0x01) == 0) | ((((value >> 14) & 0x01) == 0) << 1)); \
timer[1].direct_sound_channels = (((value >> 10) & 0x01) == 1) | \ timer[1].direct_sound_channels = (timer_ds_channel_type) \
((((value >> 14) & 0x01) == 1) << 1); \ ((((value >> 10) & 0x01) == 1) | ((((value >> 14) & 0x01) == 1) << 1)); \
direct_sound_channel[0].volume = (value >> 2) & 0x01; \ direct_sound_channel[0].volume = (direct_sound_volume_type) \
direct_sound_channel[0].status = (value >> 8) & 0x03; \ ((value >> 2) & 0x01); \
direct_sound_channel[1].volume = (value >> 3) & 0x01; \ direct_sound_channel[0].status = (direct_sound_status_type) \
direct_sound_channel[1].status = (value >> 12) & 0x03; \ ((value >> 8) & 0x03); \
direct_sound_channel[1].volume = (direct_sound_volume_type) \
((value >> 3) & 0x01); \
direct_sound_channel[1].status = (direct_sound_status_type) \
((value >> 12) & 0x03); \
gbc_sound_master_volume = value & 0x03; \ gbc_sound_master_volume = value & 0x03; \
\ \
if((value >> 11) & 0x01) \ if((value >> 11) & 0x01) \
@ -236,7 +240,7 @@ static void trigger_timer(u32 timer_number, u32 value)
timer[timer_number].status = TIMER_PRESCALE; timer[timer_number].status = TIMER_PRESCALE;
timer[timer_number].prescale = prescale; timer[timer_number].prescale = prescale;
timer[timer_number].irq = (value >> 6) & 0x01; timer[timer_number].irq = (timer_irq_type)((value >> 6) & 0x1);
write_ioreg(REG_TM0D + (timer_number * 2), (u32)(-timer_reload)); write_ioreg(REG_TM0D + (timer_number * 2), (u32)(-timer_reload));
@ -414,7 +418,7 @@ eeprom_size_type eeprom_size = EEPROM_512_BYTE;
eeprom_mode_type eeprom_mode = EEPROM_BASE_MODE; eeprom_mode_type eeprom_mode = EEPROM_BASE_MODE;
u32 eeprom_address_length; u32 eeprom_address_length;
u32 eeprom_address = 0; u32 eeprom_address = 0;
s32 eeprom_counter = 0; u32 eeprom_counter = 0;
u8 eeprom_buffer[8]; u8 eeprom_buffer[8];
void function_cc write_eeprom(u32 unused_address, u32 value) void function_cc write_eeprom(u32 unused_address, u32 value)
@ -659,7 +663,7 @@ static cpu_alert_type trigger_dma(u32 dma_number, u32 value)
{ {
if(dma[dma_number].start_type == DMA_INACTIVE) if(dma[dma_number].start_type == DMA_INACTIVE)
{ {
u32 start_type = (value >> 12) & 0x03; dma_start_type start_type = (dma_start_type)((value >> 12) & 0x03);
u32 dest_address = readaddress32(io_registers, (dma_number * 12) + 0xB4) & u32 dest_address = readaddress32(io_registers, (dma_number * 12) + 0xB4) &
0xFFFFFFF; 0xFFFFFFF;
@ -667,10 +671,10 @@ static cpu_alert_type trigger_dma(u32 dma_number, u32 value)
dma[dma_number].source_address = dma[dma_number].source_address =
readaddress32(io_registers, (dma_number * 12) + 0xB0) & 0xFFFFFFF; readaddress32(io_registers, (dma_number * 12) + 0xB0) & 0xFFFFFFF;
dma[dma_number].dest_address = dest_address; dma[dma_number].dest_address = dest_address;
dma[dma_number].source_direction = (value >> 7) & 0x03; dma[dma_number].source_direction = (dma_increment_type)((value >> 7) & 3);
dma[dma_number].repeat_type = (value >> 9) & 0x01; dma[dma_number].repeat_type = (dma_repeat_type)((value >> 9) & 0x01);
dma[dma_number].start_type = start_type; dma[dma_number].start_type = start_type;
dma[dma_number].irq = (value >> 14) & 0x01; dma[dma_number].irq = (dma_irq_type)((value >> 14) & 0x1);
/* If it is sound FIFO DMA make sure the settings are a certain way */ /* If it is sound FIFO DMA make sure the settings are a certain way */
if((dma_number >= 1) && (dma_number <= 2) && if((dma_number >= 1) && (dma_number <= 2) &&
@ -704,8 +708,8 @@ static cpu_alert_type trigger_dma(u32 dma_number, u32 value)
} }
dma[dma_number].length = length; dma[dma_number].length = length;
dma[dma_number].length_type = (value >> 10) & 0x01; dma[dma_number].length_type = (dma_length_type)((value >> 10) & 0x01);
dma[dma_number].dest_direction = (value >> 5) & 0x03; dma[dma_number].dest_direction = (dma_increment_type)((value >> 5) & 3);
} }
write_ioreg(REG_DMA0CNT_H + (dma_number * 6), value); write_ioreg(REG_DMA0CNT_H + (dma_number * 6), value);
@ -1814,7 +1818,7 @@ void function_cc write_rtc(u32 address, u32 value)
{ {
rtc_bit_count++; rtc_bit_count++;
if(rtc_bit_count == (rtc_data_bytes * 8)) if(rtc_bit_count == (signed)(rtc_data_bytes * 8))
{ {
rtc_state = RTC_IDLE; rtc_state = RTC_IDLE;
switch(rtc_write_mode) switch(rtc_write_mode)
@ -1852,7 +1856,7 @@ void function_cc write_rtc(u32 address, u32 value)
{ {
rtc_bit_count++; rtc_bit_count++;
if(rtc_bit_count == (rtc_data_bytes * 8)) if(rtc_bit_count == (signed)(rtc_data_bytes * 8))
{ {
rtc_state = RTC_IDLE; rtc_state = RTC_IDLE;
memset(rtc_registers, 0, sizeof(rtc_registers)); memset(rtc_registers, 0, sizeof(rtc_registers));
@ -3160,26 +3164,26 @@ void init_gamepak_buffer(void)
gamepak_rom = NULL; gamepak_rom = NULL;
gamepak_ram_buffer_size = 32 * 1024 * 1024; gamepak_ram_buffer_size = 32 * 1024 * 1024;
gamepak_rom = malloc(gamepak_ram_buffer_size); gamepak_rom = (u8*)malloc(gamepak_ram_buffer_size);
if(!gamepak_rom) if(!gamepak_rom)
{ {
// Try 16MB, for PSP, then lower in 2MB increments // Try 16MB, for PSP, then lower in 2MB increments
gamepak_ram_buffer_size = 16 * 1024 * 1024; gamepak_ram_buffer_size = 16 * 1024 * 1024;
gamepak_rom = malloc(gamepak_ram_buffer_size); gamepak_rom = (u8*)malloc(gamepak_ram_buffer_size);
while(!gamepak_rom) while(!gamepak_rom)
{ {
gamepak_ram_buffer_size -= (2 * 1024 * 1024); gamepak_ram_buffer_size -= (2 * 1024 * 1024);
gamepak_rom = malloc(gamepak_ram_buffer_size); gamepak_rom = (u8*)malloc(gamepak_ram_buffer_size);
} }
} }
// Here's assuming we'll have enough memory left over for this, // Here's assuming we'll have enough memory left over for this,
// and that the above succeeded (if not we're in trouble all around) // and that the above succeeded (if not we're in trouble all around)
gamepak_ram_pages = gamepak_ram_buffer_size / (32 * 1024); gamepak_ram_pages = gamepak_ram_buffer_size / (32 * 1024);
gamepak_memory_map = malloc(sizeof(gamepak_swap_entry_type) * gamepak_memory_map = (gamepak_swap_entry_type*)malloc(
gamepak_ram_pages); sizeof(gamepak_swap_entry_type) * gamepak_ram_pages);
} }
void init_memory(void) void init_memory(void)
@ -3271,7 +3275,7 @@ void gba_load_state(const void* src)
u32 i; u32 i;
u32 current_color; u32 current_color;
state_mem_read_ptr = src; state_mem_read_ptr = (u8*)src;
savestate_block(read); savestate_block(read);
#ifdef HAVE_DYNAREC #ifdef HAVE_DYNAREC
@ -3300,7 +3304,7 @@ void gba_load_state(const void* src)
void gba_save_state(void* dst) void gba_save_state(void* dst)
{ {
state_mem_write_ptr = dst; state_mem_write_ptr = (u8*)dst;
savestate_block(write); savestate_block(write);
} }

View file

@ -25,37 +25,37 @@ extern int use_libretro_save_method;
typedef enum typedef enum
{ {
DMA_START_IMMEDIATELY, DMA_START_IMMEDIATELY = 0,
DMA_START_VBLANK, DMA_START_VBLANK = 1,
DMA_START_HBLANK, DMA_START_HBLANK = 2,
DMA_START_SPECIAL, DMA_START_SPECIAL = 3,
DMA_INACTIVE DMA_INACTIVE = 4
} dma_start_type; } dma_start_type;
typedef enum typedef enum
{ {
DMA_16BIT, DMA_16BIT = 0,
DMA_32BIT DMA_32BIT = 1
} dma_length_type; } dma_length_type;
typedef enum typedef enum
{ {
DMA_NO_REPEAT, DMA_NO_REPEAT = 0,
DMA_REPEAT DMA_REPEAT = 1
} dma_repeat_type; } dma_repeat_type;
typedef enum typedef enum
{ {
DMA_INCREMENT, DMA_INCREMENT = 0,
DMA_DECREMENT, DMA_DECREMENT = 1,
DMA_FIXED, DMA_FIXED = 2,
DMA_RELOAD DMA_RELOAD = 3
} dma_increment_type; } dma_increment_type;
typedef enum typedef enum
{ {
DMA_NO_IRQ, DMA_NO_IRQ = 0,
DMA_TRIGGER_IRQ DMA_TRIGGER_IRQ = 1
} dma_irq_type; } dma_irq_type;
typedef enum typedef enum
@ -154,6 +154,7 @@ typedef enum
typedef enum typedef enum
{ {
FLASH_DEVICE_UNDEFINED = 0x00,
FLASH_DEVICE_MACRONIX_64KB = 0x1C, FLASH_DEVICE_MACRONIX_64KB = 0x1C,
FLASH_DEVICE_AMTEL_64KB = 0x3D, FLASH_DEVICE_AMTEL_64KB = 0x3D,
FLASH_DEVICE_SST_64K = 0xD4, FLASH_DEVICE_SST_64K = 0xD4,

File diff suppressed because it is too large Load diff

4
main.c
View file

@ -316,7 +316,3 @@ main_savestate_builder(read)
main_savestate_builder(write) main_savestate_builder(write)
void printout(void *str, u32 val)
{
printf(str, val);
}

4
main.h
View file

@ -31,8 +31,8 @@ typedef enum
typedef enum typedef enum
{ {
TIMER_NO_IRQ, TIMER_NO_IRQ = 0,
TIMER_TRIGGER_IRQ TIMER_TRIGGER_IRQ = 1
} timer_irq_type; } timer_irq_type;

15
sound.c
View file

@ -78,7 +78,7 @@ void sound_timer_queue32(u32 channel, u32 value)
void sound_timer(fixed8_24 frequency_step, u32 channel) void sound_timer(fixed8_24 frequency_step, u32 channel)
{ {
unsigned sample_status = DIRECT_SOUND_INACTIVE; direct_sound_status_type sample_status = DIRECT_SOUND_INACTIVE;
direct_sound_struct *ds = direct_sound_channel + channel; direct_sound_struct *ds = direct_sound_channel + channel;
fixed8_24 fifo_fractional = ds->fifo_fractional; fixed8_24 fifo_fractional = ds->fifo_fractional;
@ -98,7 +98,6 @@ void sound_timer(fixed8_24 frequency_step, u32 channel)
} }
sample_status = ds->status; sample_status = ds->status;
} }
// Unqueue 1 sample from the base of the DS FIFO and place it on the audio // Unqueue 1 sample from the base of the DS FIFO and place it on the audio
@ -190,12 +189,12 @@ void sound_reset_fifo(u32 channel)
// Square waves range from -8 (low) to 7 (high) // Square waves range from -8 (low) to 7 (high)
s8 square_pattern_duty[4][8] = const s8 square_pattern_duty[4][8] =
{ {
{ 0xF8, 0xF8, 0xF8, 0xF8, 0x07, 0xF8, 0xF8, 0xF8 }, { -8, -8, -8, -8, 7, -8, -8, -8 },
{ 0xF8, 0xF8, 0xF8, 0xF8, 0x07, 0x07, 0xF8, 0xF8 }, { -8, -8, -8, -8, 7, 7, -8, -8 },
{ 0xF8, 0xF8, 0x07, 0x07, 0x07, 0x07, 0xF8, 0xF8 }, { -8, -8, 7, 7, 7, 7, -8, -8 },
{ 0x07, 0x07, 0x07, 0x07, 0xF8, 0xF8, 0x07, 0x07 }, { 7, 7, 7, 7, -8, -8, 7, 7 },
}; };
s8 wave_samples[64]; s8 wave_samples[64];
@ -438,7 +437,7 @@ void update_gbc_sound(u32 cpu_ticks)
u32 envelope_volume; u32 envelope_volume;
s32 current_sample; s32 current_sample;
u16 sound_status = read_ioreg(REG_SOUNDCNT_X) & 0xFFF0; u16 sound_status = read_ioreg(REG_SOUNDCNT_X) & 0xFFF0;
s8 *sample_data; const s8 *sample_data;
s8 *wave_bank; s8 *wave_bank;
u8 *wave_ram = ((u8 *)io_registers) + 0x90; u8 *wave_ram = ((u8 *)io_registers) + 0x90;

24
sound.h
View file

@ -29,16 +29,16 @@
typedef enum typedef enum
{ {
DIRECT_SOUND_INACTIVE, DIRECT_SOUND_INACTIVE = 0,
DIRECT_SOUND_RIGHT, DIRECT_SOUND_RIGHT = 1,
DIRECT_SOUND_LEFT, DIRECT_SOUND_LEFT = 2,
DIRECT_SOUND_LEFTRIGHT DIRECT_SOUND_LEFTRIGHT = 3
} direct_sound_status_type; } direct_sound_status_type;
typedef enum typedef enum
{ {
DIRECT_SOUND_VOLUME_50, DIRECT_SOUND_VOLUME_50 = 0,
DIRECT_SOUND_VOLUME_100 DIRECT_SOUND_VOLUME_100 = 1
} direct_sound_volume_type; } direct_sound_volume_type;
typedef struct typedef struct
@ -57,10 +57,10 @@ typedef struct
typedef enum typedef enum
{ {
GBC_SOUND_INACTIVE, GBC_SOUND_INACTIVE = 0,
GBC_SOUND_RIGHT, GBC_SOUND_RIGHT = 1,
GBC_SOUND_LEFT, GBC_SOUND_LEFT = 2,
GBC_SOUND_LEFTRIGHT GBC_SOUND_LEFTRIGHT = 3
} gbc_sound_status_type; } gbc_sound_status_type;
@ -92,12 +92,12 @@ typedef struct
gbc_sound_status_type status; gbc_sound_status_type status;
u32 active_flag; u32 active_flag;
u32 master_enable; u32 master_enable;
s8* sample_data; const s8* sample_data;
} gbc_sound_struct; } gbc_sound_struct;
const extern s8 square_pattern_duty[4][8];
extern direct_sound_struct direct_sound_channel[2]; extern direct_sound_struct direct_sound_channel[2];
extern gbc_sound_struct gbc_sound_channel[4]; extern gbc_sound_struct gbc_sound_channel[4];
extern s8 square_pattern_duty[4][8];
extern u32 gbc_sound_master_volume_left; extern u32 gbc_sound_master_volume_left;
extern u32 gbc_sound_master_volume_right; extern u32 gbc_sound_master_volume_right;
extern u32 gbc_sound_master_volume; extern u32 gbc_sound_master_volume;

View file

@ -3264,10 +3264,10 @@ static void render_scanline_obj_##alpha_op##_##map_space(u32 priority, \
u32 start, u32 end, render_scanline_dest_##alpha_op *scanline) \ u32 start, u32 end, render_scanline_dest_##alpha_op *scanline) \
{ \ { \
render_scanline_obj_extra_variables_##alpha_op(map_space); \ render_scanline_obj_extra_variables_##alpha_op(map_space); \
s32 obj_num, i; \ u32 obj_num, i; \
s32 obj_x, obj_y; \ s32 obj_x, obj_y; \
s32 obj_size; \ u32 obj_size; \
s32 obj_width, obj_height; \ u32 obj_width, obj_height; \
u32 obj_attribute_0, obj_attribute_1, obj_attribute_2; \ u32 obj_attribute_0, obj_attribute_1, obj_attribute_2; \
s32 vcount = read_ioreg(REG_VCOUNT); \ s32 vcount = read_ioreg(REG_VCOUNT); \
u32 tile_run; \ u32 tile_run; \
@ -3328,7 +3328,7 @@ static void order_obj(u32 video_mode)
{ {
s32 obj_num, priority, row; s32 obj_num, priority, row;
s32 obj_x, obj_y; s32 obj_x, obj_y;
s32 obj_size, obj_mode; u32 obj_size, obj_mode;
s32 obj_width, obj_height; s32 obj_width, obj_height;
u32 obj_priority; u32 obj_priority;
u32 obj_attribute_0, obj_attribute_1, obj_attribute_2; u32 obj_attribute_0, obj_attribute_1, obj_attribute_2;