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Fix interpreter bug on store-triggered DMAs

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In thumb mode, a store that triggers a DMA and its correspondoing DMA
IRQ (since emulate DMAs being instantanious, which is another can of
worms tho...) overrwrites the PC with the PC-next value (disregarding
the IRQ handler address). This causes quite a few bugs. I'd expect it
causing way more bugs, but it doesnt...?

Anyway this fixes a few games like Buffy, Woody, Medabots, Super
Duper Sumos and Power Rangers
This commit is contained in:
David Guillen Fandos 2023-04-03 19:54:07 +02:00
parent 541adc9e1c
commit c0b2f05e1d
1 changed files with 2 additions and 2 deletions
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4
cpu.c
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@ -1442,9 +1442,9 @@ const u32 spsr_masks[4] = { 0x00000000, 0x000000EF, 0xF0000000, 0xF00000EF };
#define thumb_access_memory(access_type, op_type, address, reg_op, \ #define thumb_access_memory(access_type, op_type, address, reg_op, \
mem_type) \ mem_type) \
{ \ { \
thumb_pc_offset(2); \
thumb_decode_##op_type(); \ thumb_decode_##op_type(); \
access_type##_memory_##mem_type(address, reg_op); \ access_type##_memory_##mem_type(address, reg_op); \
thumb_pc_offset(2); \
} \ } \
#define thumb_block_address_preadjust_no_op() \ #define thumb_block_address_preadjust_no_op() \
@ -3464,7 +3464,7 @@ thumb_loop:
case 0x48 ... 0x4F: case 0x48 ... 0x4F:
/* LDR r0..7, [pc + imm] */ /* LDR r0..7, [pc + imm] */
thumb_access_memory(load, imm, (pc & ~2) + (imm * 4) + 4, reg[(opcode >> 8) & 7], u32); thumb_access_memory(load, imm, ((pc-2) & ~2) + (imm * 4) + 4, reg[(opcode >> 8) & 7], u32);
break; break;
case 0x50: case 0x50: