Move a few more registers to context
This gets rid of some more absolute addrs in the MIPS dynarec. Tested on several platforms, we should be good.
This commit is contained in:
David Guillen Fandos
parent
bfc7cc7fdf
commit
46cad2958a
4 changed files with 31 additions and 24 deletions
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@ -771,6 +771,8 @@ execute_load_builder(u32, 32, ldrne, #0xF0000000)
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.comm memory_map_write 0x8000
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.comm palette_ram 0x400
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.comm palette_ram_converted 0x400
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.comm spsr 24
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.comm reg_mode 196
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.globl reg
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.globl _reg
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6
cpu.c
6
cpu.c
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@ -1544,8 +1544,6 @@ const u32 psr_masks[16] =
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// reg_mode[new_mode][6]. When swapping to/from FIQ retire/load reg[8]
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// through reg[14] to/from reg_mode[MODE_FIQ][0] through reg_mode[MODE_FIQ][6].
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u32 reg_mode[7][7];
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u32 cpu_modes[32] =
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{
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MODE_INVALID, MODE_INVALID, MODE_INVALID, MODE_INVALID, MODE_INVALID,
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@ -1564,9 +1562,9 @@ u32 cpu_modes_cpsr[7] = { 0x10, 0x11, 0x12, 0x13, 0x17, 0x1B, 0x1F };
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#ifndef HAVE_DYNAREC
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u32 reg[64];
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#endif
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u32 spsr[6];
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u32 reg_mode[7][7];
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#endif
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// ARM/Thumb mode is stored in the flags directly, this is simpler than
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// shadowing it since it has a constant 1bit represenation.
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@ -52,8 +52,8 @@
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.global memory_map_read
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.global memory_map_write
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.global reg
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.extern spsr
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.global spsr
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.global reg_mode
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# MIPS register layout:
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@ -121,8 +121,10 @@
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.equ COMPLETED_FRAME, (32 * 4)
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.equ GP_SAVE, (33 * 4)
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.equ SUPERVISOR_LR, (reg_mode + (3 * (7 * 4)) + (6 * 4))
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.equ SUPERVISOR_SPSR, (spsr + (3 * 4))
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.equ SPSR_BASE, (0x900)
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.equ REGMODE_BASE, (0x900 + 24)
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.equ SUPERVISOR_SPSR, (3 * 4 + SPSR_BASE)
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.equ SUPERVISOR_LR, ((3 * (7 * 4)) + (6 * 4) + REGMODE_BASE)
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.set noat
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.set noreorder
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@ -2558,11 +2560,10 @@ execute_read_cpsr:
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execute_read_spsr:
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lw $1, CPU_MODE($16) # $1 = cpu_mode
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lui $2, %hi(spsr)
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sll $1, $1, 2 # adjust to word offset size
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addu $2, $2, $1
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addu $2, $1, $16
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jr $ra # return
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lw $2, %lo(spsr)($2) # $2 = spsr[cpu_mode] (delay slot)
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lw $2, SPSR_BASE($2) # $2 = spsr[cpu_mode] (delay slot)
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# Switch into SWI, has to collapse flags
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# $4: Current pc
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@ -2570,11 +2571,9 @@ execute_read_spsr:
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execute_swi:
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add $sp, $sp, -4 # push $ra
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sw $ra, ($sp)
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lui $1, %hi(SUPERVISOR_LR)
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sw $4, %lo(SUPERVISOR_LR)($1) # store next PC in the supervisor's LR
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sw $4, SUPERVISOR_LR($16) # store next PC in the supervisor's LR
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collapse_flags # get cpsr in $2
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lui $5, %hi(SUPERVISOR_SPSR)
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sw $2, %lo(SUPERVISOR_SPSR)($5) # save cpsr in SUPERVISOR_CPSR
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sw $2, SUPERVISOR_SPSR($16) # save cpsr in SUPERVISOR_CPSR
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ins $2, $0, 0, 6 # zero out bottom 6 bits of CPSR
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ori $2, 0x13 # set mode to supervisor
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sw $2, REG_CPSR($16) # write back CPSR
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@ -2593,11 +2592,10 @@ execute_spsr_restore:
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lw $1, CPU_MODE($16) # $1 = cpu_mode
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beq $1, $0, no_spsr_restore # only restore if the cpu isn't usermode
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lui $2, %hi(spsr) # start loading SPSR (delay)
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sll $2, $1, 2 # adjust to word offset size (delay)
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sll $1, $1, 2 # adjust to word offset size
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addu $2, $2, $1
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lw $1, %lo(spsr)($2) # $1 = spsr[cpu_mode]
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addu $2, $2, $16
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lw $1, SPSR_BASE($2) # $1 = spsr[cpu_mode]
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sw $1, REG_CPSR($16) # cpsr = spsr[cpu_mode]
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extract_flags_body # extract flags from $1
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addiu $sp, $sp, -4
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@ -2654,16 +2652,15 @@ changed_pc_cpsr:
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execute_store_spsr:
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lw $1, CPU_MODE($16) # $1 = cpu_mode
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lui $2, %hi(spsr)
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sll $1, $1, 2 # adjust to word offset size
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addu $1, $2, $1
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lw $2, %lo(spsr)($1) # $2 = spsr[cpu_mode]
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addu $1, $1, $16
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lw $2, SPSR_BASE($1) # $2 = spsr[cpu_mode]
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and $4, $4, $5 # $4 = new_spsr & store_mask
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nor $5, $5, $0 # $5 = ~store_mask
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and $2, $2, $5 # $2 = (spsr & (~store_mask))
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or $4, $4, $2 # $4 = new spsr combined with old
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jr $ra # return
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sw $4, %lo(spsr)($1) # spsr[cpu_mode] = $4 (delay slot)
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sw $4, SPSR_BASE($1) # spsr[cpu_mode] = $4 (delay slot)
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# $4: value
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# $5: shift
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@ -2813,7 +2810,10 @@ palette_ram:
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.space 0x400
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palette_ram_converted:
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.space 0x400
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spsr:
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.space 24 # u32[6]
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reg_mode:
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.space 196 # u32[7][7];
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memory_map_write:
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.space 0x8000
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@ -31,6 +31,7 @@
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#define _memory_map_read memory_map_read
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#define _memory_map_write memory_map_write
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#define _reg reg
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#define _reg_mode reg_mode
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#define _oam_update oam_update
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#define _iwram iwram
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#define _ewram ewram
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@ -69,6 +70,8 @@
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.global _memory_map_read
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.global _memory_map_write
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.global _reg
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.global _reg_mode
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.global _spsr
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.global _palette_ram
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.global _palette_ram_converted
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@ -567,6 +570,10 @@ _palette_ram:
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.space 0x400
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_palette_ram_converted:
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.space 0x400
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_spsr:
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.space 24
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_reg_mode:
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.space 196
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.comm _memory_map_read 0x8000
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.comm _memory_map_write 0x8000
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