281 lines
7.3 KiB
C
281 lines
7.3 KiB
C
/* gameplaySP
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*
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* Copyright (C) 2006 Exophase <exophase@gmail.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef MEMORY_H
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#define MEMORY_H
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#include "libretro.h"
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extern int use_libretro_save_method;
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#define DMA_CHAN_CNT 4
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#define DMA_START_IMMEDIATELY 0
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#define DMA_START_VBLANK 1
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#define DMA_START_HBLANK 2
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#define DMA_START_SPECIAL 3
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#define DMA_INACTIVE 4
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#define DMA_16BIT 0
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#define DMA_32BIT 1
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#define DMA_NO_REPEAT 0
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#define DMA_REPEAT 1
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#define DMA_INCREMENT 0
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#define DMA_DECREMENT 1
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#define DMA_FIXED 2
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#define DMA_RELOAD 3
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#define DMA_NO_IRQ 0
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#define DMA_TRIGGER_IRQ 1
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#define DMA_DIRECT_SOUND_A 0
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#define DMA_DIRECT_SOUND_B 1
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#define DMA_NO_DIRECT_SOUND 2
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typedef struct
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{
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u32 source_address;
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u32 dest_address;
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u32 length;
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u32 repeat_type;
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u32 direct_sound_channel;
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u32 source_direction;
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u32 dest_direction;
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u32 length_type;
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u32 start_type;
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u32 irq;
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} dma_transfer_type;
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typedef enum
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{
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REG_DISPCNT = 0x000,
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REG_DISPSTAT = 0x002,
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REG_VCOUNT = 0x003,
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REG_BG0CNT = 0x004,
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REG_BG1CNT = 0x005,
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REG_BG2CNT = 0x006,
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REG_BG3CNT = 0x007,
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REG_BG0HOFS = 0x08,
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REG_BG0VOFS = 0x09,
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REG_BG1HOFS = 0x0A,
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REG_BG1VOFS = 0x0B,
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REG_BG2HOFS = 0x0C,
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REG_BG2VOFS = 0x0D,
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REG_BG3HOFS = 0x0E,
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REG_BG3VOFS = 0x0F,
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REG_BG2PA = 0x10,
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REG_BG2PB = 0x11,
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REG_BG2PC = 0x12,
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REG_BG2PD = 0x13,
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REG_BG2X_L = 0x14,
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REG_BG2X_H = 0x15,
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REG_BG2Y_L = 0x16,
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REG_BG2Y_H = 0x17,
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REG_BG3PA = 0x18,
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REG_BG3PB = 0x19,
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REG_BG3PC = 0x1A,
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REG_BG3PD = 0x1B,
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REG_BG3X_L = 0x1C,
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REG_BG3X_H = 0x1D,
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REG_BG3Y_L = 0x1E,
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REG_BG3Y_H = 0x1F,
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REG_WIN0H = 0x20,
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REG_WIN1H = 0x21,
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REG_WIN0V = 0x22,
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REG_WIN1V = 0x23,
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REG_WININ = 0x24,
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REG_WINOUT = 0x25,
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REG_BLDCNT = 0x28,
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REG_BLDALPHA = 0x29,
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REG_BLDY = 0x2A,
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// Sound control registers
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REG_SOUND1CNT_L = 0x30,
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REG_SOUND1CNT_H = 0x31,
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REG_SOUND1CNT_X = 0x32,
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REG_SOUND2CNT_L = 0x34,
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REG_SOUND2CNT_H = 0x36,
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REG_SOUND3CNT_L = 0x38,
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REG_SOUND3CNT_H = 0x39,
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REG_SOUND3CNT_X = 0x3A,
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REG_SOUND4CNT_L = 0x3C,
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REG_SOUND4CNT_H = 0x3E,
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REG_SOUNDCNT_L = 0x40,
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REG_SOUNDCNT_H = 0x41,
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REG_SOUNDCNT_X = 0x42,
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// DMA control
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REG_DMA0SAD = 0x58,
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REG_DMA0DAD = 0x5A,
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REG_DMA0CNT_L = 0x5C,
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REG_DMA0CNT_H = 0x5D,
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REG_DMA1SAD = 0x5E,
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REG_DMA1DAD = 0x60,
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REG_DMA1CNT_L = 0x62,
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REG_DMA1CNT_H = 0x63,
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REG_DMA2SAD = 0x64,
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REG_DMA2DAD = 0x66,
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REG_DMA2CNT_L = 0x68,
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REG_DMA2CNT_H = 0x69,
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REG_DMA3SAD = 0x6A,
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REG_DMA3DAD = 0x6C,
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REG_DMA3CNT_L = 0x6E,
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REG_DMA3CNT_H = 0x6F,
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// Timers
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REG_TM0D = 0x80,
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REG_TM0CNT = 0x81,
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REG_TM1D = 0x82,
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REG_TM1CNT = 0x83,
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REG_TM2D = 0x84,
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REG_TM2CNT = 0x85,
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REG_TM3D = 0x86,
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REG_TM3CNT = 0x87,
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REG_P1 = 0x098,
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REG_P1CNT = 0x099,
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REG_RCNT = 0x9A,
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REG_IE = 0x100,
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REG_IF = 0x101,
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REG_IME = 0x104,
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REG_HALTCNT = 0x180
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} hardware_register;
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#define FLASH_DEVICE_UNDEFINED 0x00
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#define FLASH_DEVICE_MACRONIX_64KB 0x1C
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#define FLASH_DEVICE_AMTEL_64KB 0x3D
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#define FLASH_DEVICE_SST_64K 0xD4
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#define FLASH_DEVICE_PANASONIC_64KB 0x1B
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#define FLASH_DEVICE_MACRONIX_128KB 0x09
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#define FLASH_MANUFACTURER_MACRONIX 0xC2
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#define FLASH_MANUFACTURER_AMTEL 0x1F
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#define FLASH_MANUFACTURER_PANASONIC 0x32
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#define FLASH_MANUFACTURER_SST 0xBF
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u32 function_cc read_memory8(u32 address);
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u32 function_cc read_memory8s(u32 address);
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u32 function_cc read_memory16(u32 address);
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u16 function_cc read_memory16_signed(u32 address);
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u32 function_cc read_memory16s(u32 address);
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u32 function_cc read_memory32(u32 address);
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cpu_alert_type function_cc write_memory8(u32 address, u8 value);
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cpu_alert_type function_cc write_memory16(u32 address, u16 value);
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cpu_alert_type function_cc write_memory32(u32 address, u32 value);
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u32 function_cc read_eeprom(void);
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void function_cc write_eeprom(u32 address, u32 value);
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u8 read_backup(u32 address);
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void function_cc write_backup(u32 address, u32 value);
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void function_cc write_rtc(u32 address, u32 value);
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/* EDIT: Shouldn't this be extern ?! */
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extern const u32 waitstate_cycles_sequential[16][3];
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extern u32 gamepak_size;
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extern char gamepak_title[13];
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extern char gamepak_code[5];
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extern char gamepak_maker[3];
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extern char gamepak_filename[512];
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cpu_alert_type dma_transfer(unsigned dma_chan);
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u8 *memory_region(u32 address, u32 *memory_limit);
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u32 load_gamepak(const struct retro_game_info* info, const char *name);
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u32 load_backup(char *name);
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s32 load_bios(char *name);
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void update_backup(void);
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void init_memory(void);
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void init_gamepak_buffer(void);
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void memory_term(void);
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u8 *load_gamepak_page(u32 physical_index);
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extern u32 oam_update;
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extern u32 gbc_sound_update;
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extern u32 gbc_sound_wave_update;
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extern dma_transfer_type dma[DMA_CHAN_CNT];
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extern u8 open_gba_bios_rom[1024*16];
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extern u32 bios_read_protect;
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extern u16 palette_ram[512];
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extern u16 oam_ram[512];
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extern u16 palette_ram_converted[512];
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extern u16 io_registers[512];
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extern u8 vram[1024 * 96];
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extern u8 bios_rom[1024 * 16];
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// Double buffer used for SMC detection
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extern u8 ewram[1024 * 256 * 2];
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extern u8 iwram[1024 * 32 * 2];
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extern u8 *memory_map_read[8 * 1024];
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extern u32 reg[64];
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#define BACKUP_SRAM 0
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#define BACKUP_FLASH 1
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#define BACKUP_EEPROM 2
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#define BACKUP_NONE 3
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#define SRAM_SIZE_32KB 1
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#define SRAM_SIZE_64KB 2
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#define FLASH_SIZE_64KB 1
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#define FLASH_SIZE_128KB 2
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#define EEPROM_512_BYTE 1
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#define EEPROM_8_KBYTE 16
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#define EEPROM_BASE_MODE 0
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#define EEPROM_READ_MODE 1
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#define EEPROM_READ_HEADER_MODE 2
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#define EEPROM_ADDRESS_MODE 3
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#define EEPROM_WRITE_MODE 4
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#define EEPROM_WRITE_ADDRESS_MODE 5
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#define EEPROM_ADDRESS_FOOTER_MODE 6
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#define EEPROM_WRITE_FOOTER_MODE 7
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#define FLASH_BASE_MODE 0
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#define FLASH_ERASE_MODE 1
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#define FLASH_ID_MODE 2
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#define FLASH_WRITE_MODE 3
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#define FLASH_BANKSWITCH_MODE 4
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extern u32 backup_type;
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extern u32 sram_bankcount;
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extern u32 flash_bank_cnt;
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extern u32 eeprom_size;
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extern u8 gamepak_backup[1024 * 128];
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// Page sticky bit routines
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extern u32 gamepak_sticky_bit[1024/32];
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static inline void touch_gamepak_page(u32 physical_index)
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{
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u32 idx = (physical_index >> 5) & 31;
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u32 bof = physical_index & 31;
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gamepak_sticky_bit[idx] |= (1 << bof);
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}
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static inline void clear_gamepak_stickybits(void)
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{
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memset(gamepak_sticky_bit, 0, sizeof(gamepak_sticky_bit));
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}
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unsigned memory_write_savestate(u8 *dst);
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bool memory_read_savestate(const u8*src);
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#endif
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