Merge pull request #92 from davidgfnet/master
Minor cleanup in ARM and MIPS
This commit is contained in:
Autechre
GitHub
commit
fa74054508
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@ -115,7 +115,7 @@ void execute_store_u32_safe(u32 address, u32 source);
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#define reg_x4 ARMREG_R7
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#define reg_x4 ARMREG_R7
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#define reg_x5 ARMREG_R8
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#define reg_x5 ARMREG_R8
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#define mem_reg -1
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#define mem_reg (~0U)
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/*
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/*
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@ -157,7 +157,7 @@ r15: 0.091287% (-- 100.000000%)
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*/
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*/
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s32 arm_register_allocation[] =
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u32 arm_register_allocation[] =
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{
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{
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reg_x0, /* GBA r0 */
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reg_x0, /* GBA r0 */
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reg_x1, /* GBA r1 */
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reg_x1, /* GBA r1 */
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@ -194,7 +194,7 @@ s32 arm_register_allocation[] =
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mem_reg,
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mem_reg,
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};
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};
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s32 thumb_register_allocation[] =
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u32 thumb_register_allocation[] =
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{
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{
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reg_x0, /* GBA r0 */
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reg_x0, /* GBA r0 */
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reg_x1, /* GBA r1 */
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reg_x1, /* GBA r1 */
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@ -552,7 +552,7 @@ u32 arm_disect_imm_32bit(u32 imm, u32 *stores, u32 *rotations)
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\
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\
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void generate_load_reg(u32 ireg, u32 reg_index) \
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void generate_load_reg(u32 ireg, u32 reg_index) \
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{ \
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{ \
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s32 load_src = arm_register_allocation[reg_index]; \
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u32 load_src = arm_register_allocation[reg_index]; \
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if(load_src != mem_reg) \
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if(load_src != mem_reg) \
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{ \
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{ \
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ARM_MOV_REG_REG(0, ireg, load_src); \
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ARM_MOV_REG_REG(0, ireg, load_src); \
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@ -565,7 +565,7 @@ u32 arm_disect_imm_32bit(u32 imm, u32 *stores, u32 *rotations)
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\
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\
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void generate_store_reg(u32 ireg, u32 reg_index) \
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void generate_store_reg(u32 ireg, u32 reg_index) \
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{ \
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{ \
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s32 store_dest = arm_register_allocation[reg_index]; \
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u32 store_dest = arm_register_allocation[reg_index]; \
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if(store_dest != mem_reg) \
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if(store_dest != mem_reg) \
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{ \
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{ \
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ARM_MOV_REG_REG(0, store_dest, ireg); \
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ARM_MOV_REG_REG(0, store_dest, ireg); \
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@ -621,7 +621,7 @@ u32 arm_disect_imm_32bit(u32 imm, u32 *stores, u32 *rotations)
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\
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\
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void generate_load_reg(u32 ireg, u32 reg_index) \
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void generate_load_reg(u32 ireg, u32 reg_index) \
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{ \
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{ \
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s32 load_src = thumb_register_allocation[reg_index]; \
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u32 load_src = thumb_register_allocation[reg_index]; \
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if(load_src != mem_reg) \
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if(load_src != mem_reg) \
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{ \
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{ \
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ARM_MOV_REG_REG(0, ireg, load_src); \
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ARM_MOV_REG_REG(0, ireg, load_src); \
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@ -634,7 +634,7 @@ u32 arm_disect_imm_32bit(u32 imm, u32 *stores, u32 *rotations)
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\
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\
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void generate_store_reg(u32 ireg, u32 reg_index) \
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void generate_store_reg(u32 ireg, u32 reg_index) \
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{ \
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{ \
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s32 store_dest = thumb_register_allocation[reg_index]; \
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u32 store_dest = thumb_register_allocation[reg_index]; \
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if(store_dest != mem_reg) \
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if(store_dest != mem_reg) \
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{ \
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{ \
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ARM_MOV_REG_REG(0, store_dest, ireg); \
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ARM_MOV_REG_REG(0, store_dest, ireg); \
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@ -939,31 +939,6 @@ _execute_patch_bios_protect:
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str r0, [r1, #-REG_BASE_OFFSET]
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str r0, [r1, #-REG_BASE_OFFSET]
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bx lr
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bx lr
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#define save_reg_scratch(reg) ;\
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ldr r2, [reg_base, #(REG_BASE_OFFSET + (reg * 4))] ;\
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str r2, [reg_base, #(REG_BASE_OFFSET + (reg * 4) + 128)] ;\
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#define restore_reg_scratch(reg) ;\
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ldr r2, [reg_base, #(REG_BASE_OFFSET + (reg * 4) + 128)] ;\
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str r2, [reg_base, #(REG_BASE_OFFSET + (reg * 4))] ;\
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#define scratch_regs_thumb(type) ;\
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type##_reg_scratch(0) ;\
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type##_reg_scratch(1) ;\
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type##_reg_scratch(2) ;\
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type##_reg_scratch(3) ;\
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type##_reg_scratch(4) ;\
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type##_reg_scratch(5) ;\
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#define scratch_regs_arm(type) ;\
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type##_reg_scratch(0) ;\
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type##_reg_scratch(1) ;\
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type##_reg_scratch(6) ;\
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type##_reg_scratch(9) ;\
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type##_reg_scratch(12) ;\
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type##_reg_scratch(14) ;\
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.pool
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.pool
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.comm memory_map_read 0x8000
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.comm memory_map_read 0x8000
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@ -1974,64 +1974,6 @@ u32 execute_store_cpsr_body(u32 _cpsr, u32 store_mask, u32 address)
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generate_indirect_branch_arm(); \
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generate_indirect_branch_arm(); \
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} \
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} \
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#define old_arm_block_memory(access_type, pre_op, post_op, wb, s_bit) \
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{ \
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arm_decode_block_trans(); \
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u32 i; \
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u32 offset = 0; \
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u32 base_reg = arm_to_mips_reg[rn]; \
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\
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arm_block_address_preadjust_##pre_op(wb); \
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arm_block_address_postadjust_##post_op(); \
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\
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sprint_##s_bit(access_type, pre_op, post_op, wb); \
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\
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if((rn == REG_SP) && iwram_stack_optimize) \
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{ \
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mips_emit_andi(reg_a1, reg_a2, 0x7FFC); \
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generate_load_imm(reg_a0, ((u32)(iwram + 0x8000))); \
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mips_emit_addu(reg_a1, reg_a1, reg_a0); \
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\
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for(i = 0; i < 16; i++) \
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{ \
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if((reg_list >> i) & 0x01) \
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{ \
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cycle_count++; \
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arm_block_memory_sp_##access_type(); \
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offset += 4; \
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} \
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} \
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\
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arm_block_memory_sp_adjust_pc_##access_type(); \
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} \
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else \
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{ \
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mips_emit_ins(reg_a2, reg_zero, 0, 2); \
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\
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for(i = 0; i < 16; i++) \
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{ \
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if((reg_list >> i) & 0x01) \
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{ \
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cycle_count++; \
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mips_emit_addiu(reg_a0, reg_a2, offset); \
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if(reg_list & ~((2 << i) - 1)) \
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{ \
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arm_block_memory_##access_type(); \
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offset += 4; \
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} \
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else \
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{ \
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arm_block_memory_final_##access_type(); \
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break; \
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} \
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} \
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} \
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\
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arm_block_memory_adjust_pc_##access_type(); \
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} \
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}
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// This isn't really a correct implementation, may have to fix later.
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// This isn't really a correct implementation, may have to fix later.
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282
psp/mips_stub.S
282
psp/mips_stub.S
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@ -1319,7 +1319,6 @@ execute_load_open_u16u:
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ror $2, $2, 8 # rotate value by 8bits
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ror $2, $2, 8 # rotate value by 8bits
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load_u16_ftable:
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load_u16_ftable:
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# .long execute_load_full_u16
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.long execute_load_bios_u16 # 0x00 BIOS
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.long execute_load_bios_u16 # 0x00 BIOS
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.long execute_load_open_u16 # 0x01 open address
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.long execute_load_open_u16 # 0x01 open address
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.long execute_load_ewram_u16 # 0x02 EWRAM
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.long execute_load_ewram_u16 # 0x02 EWRAM
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@ -1333,7 +1332,6 @@ load_u16_ftable:
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.long execute_load_gamepakA_u16 # 0x0A gamepak
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.long execute_load_gamepakA_u16 # 0x0A gamepak
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.long execute_load_gamepakB_u16 # 0x0B gamepak
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.long execute_load_gamepakB_u16 # 0x0B gamepak
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.long execute_load_gamepakC_u16 # 0x0C gamepak
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.long execute_load_gamepakC_u16 # 0x0C gamepak
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.long execute_load_eeprom_u16 # 0x0D gamepak/eeprom
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.long execute_load_eeprom_u16 # 0x0D gamepak/eeprom
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.long execute_load_backup_u16 # 0x0E Flash ROM/SRAM
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.long execute_load_backup_u16 # 0x0E Flash ROM/SRAM
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.long execute_load_open_u16 # 0x0F open
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.long execute_load_open_u16 # 0x0F open
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@ -1355,42 +1353,6 @@ load_u16_ftable:
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.long execute_load_backup_u16u # 0x0E Flash ROM/SRAM unaligned
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.long execute_load_backup_u16u # 0x0E Flash ROM/SRAM unaligned
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.long execute_load_open_u16u # 0x0F open unaligned
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.long execute_load_open_u16u # 0x0F open unaligned
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.long execute_load_full_u16
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.long execute_load_full_u16
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.long execute_load_full_u16
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.long execute_load_full_u16
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.long execute_load_full_u16
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.long execute_load_full_u16
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.long execute_load_full_u16
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.long execute_load_full_u16
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.long execute_load_full_u16
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.long execute_load_full_u16
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.long execute_load_full_u16
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.long execute_load_full_u16
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.long execute_load_full_u16
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.long execute_load_full_u16
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.long execute_load_full_u16
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.long execute_load_full_u16
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.long execute_load_full_u16
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.long execute_load_full_u16
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.long execute_load_full_u16
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.long execute_load_full_u16
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.long execute_load_full_u16
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.long execute_load_full_u16
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.long execute_load_full_u16
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.long execute_load_full_u16
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.long execute_load_full_u16
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.long execute_load_full_u16
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.long execute_load_full_u16
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.long execute_load_full_u16
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.long execute_load_full_u16
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.long execute_load_full_u16
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.long execute_load_full_u16
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patch_load_u16:
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patch_load_u16:
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patch_handler_align load_u16_ftable, 1
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patch_handler_align load_u16_ftable, 1
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@ -1921,7 +1883,6 @@ load_u32_ftable:
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.long execute_load_gamepakA_u32 # 0x0A gamepak
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.long execute_load_gamepakA_u32 # 0x0A gamepak
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.long execute_load_gamepakB_u32 # 0x0B gamepak
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.long execute_load_gamepakB_u32 # 0x0B gamepak
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.long execute_load_gamepakC_u32 # 0x0C gamepak
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.long execute_load_gamepakC_u32 # 0x0C gamepak
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.long execute_load_eeprom_u32 # 0x0D gamepak/eeprom
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.long execute_load_eeprom_u32 # 0x0D gamepak/eeprom
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.long execute_load_backup_u32 # 0x0E Flash ROM/SRAM
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.long execute_load_backup_u32 # 0x0E Flash ROM/SRAM
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.long execute_load_open_u32 # 0x0F open
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.long execute_load_open_u32 # 0x0F open
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@ -2001,7 +1962,7 @@ execute_load_bios_u32a:
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load_u32 bios_read_protect
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load_u32 bios_read_protect
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2:
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2:
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open_load32_a
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open_load32_core
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nop
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nop
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execute_load_ewram_u32a:
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execute_load_ewram_u32a:
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@ -2510,163 +2471,6 @@ patch_store_u32a:
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patch_handler store_u32a_ftable, 0x0F
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patch_handler store_u32a_ftable, 0x0F
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#execute_load_u8:
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execute_load_full_u8:
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srl $1, $4, 28 # check if the address is out of range
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bne $1, $0, ext_load_u8 # if it is, perform an extended read
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srl $2, $4, 15 # $1 = page number of address
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sll $2, $2, 2 # adjust to word index
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addu $2, $2, $16 # $1 = memory_map_read[address >> 15]
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lw $1, -32768($2)
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beq $1, $0, ext_load_u8 # if it's NULL perform an extended read
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andi $2, $4, 0x7FFF # $2 = low 15bits of address (delay slot)
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addu $1, $1, $2 # add the memory map offset
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jr $ra # return
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lbu $2, ($1) # read the value
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ext_load_u8:
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addiu $sp, $sp, -4 # make room on the stack for $ra
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sw $ra, ($sp) # store return address
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save_registers
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jal read_memory8 # read the value
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nop
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restore_registers
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lw $ra, ($sp) # restore return address
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jr $ra # return
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addiu $sp, $sp, 4 # fix stack (delay slot)
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#execute_load_s8:
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execute_load_full_s8:
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srl $1, $4, 28 # check if the address is out of range
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bne $1, $0, ext_load_s8 # if it is, perform an extended read
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srl $2, $4, 15 # $1 = page number of address
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sll $2, $2, 2 # adjust to word index
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addu $2, $2, $16 # $1 = memory_map_read[address >> 15]
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lw $1, -32768($2)
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beq $1, $0, ext_load_s8 # if it's NULL perform an extended read
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andi $2, $4, 0x7FFF # $2 = low 15bits of address (delay slot)
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addu $1, $1, $2 # add the memory map offset
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jr $ra # return
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lb $2, ($1) # read the value
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ext_load_s8:
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addiu $sp, $sp, -4 # make room on the stack for $ra
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sw $ra, ($sp) # store return address
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save_registers
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jal read_memory8 # read the value
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nop
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restore_registers
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seb $2, $2 # sign extend the read value
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lw $ra, ($sp) # restore return address
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jr $ra # return
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addiu $sp, $sp, 4 # fix stack (delay slot)
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#execute_load_u16:
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execute_load_full_u16:
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srl $1, $4, 28 # check if the address is out of range
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ins $1, $4, 4, 1 # or unaligned (bottom bit)
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bne $1, $0, ext_load_u16 # if it is, perform an extended read
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srl $2, $4, 15 # $1 = page number of address
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sll $2, $2, 2 # adjust to word index
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addu $2, $2, $16 # $1 = memory_map_read[address >> 15]
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lw $1, -32768($2)
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beq $1, $0, ext_load_u16 # if it's NULL perform an extended read
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andi $2, $4, 0x7FFF # $2 = low 15bits of address (delay slot)
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addu $1, $1, $2 # add the memory map offset
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jr $ra # return
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|
||||||
lhu $2, ($1) # read the value
|
|
||||||
|
|
||||||
ext_load_u16:
|
|
||||||
addiu $sp, $sp, -4 # make room on the stack for $ra
|
|
||||||
sw $ra, ($sp) # store return address
|
|
||||||
save_registers
|
|
||||||
jal read_memory16 # read the value
|
|
||||||
nop
|
|
||||||
restore_registers
|
|
||||||
lw $ra, ($sp) # restore return address
|
|
||||||
jr $ra # return
|
|
||||||
addiu $sp, $sp, 4 # fix stack (delay slot)
|
|
||||||
|
|
||||||
#execute_load_s16:
|
|
||||||
execute_load_full_s16:
|
|
||||||
srl $1, $4, 28 # check if the address is out of range
|
|
||||||
ins $1, $4, 4, 1 # or unaligned (bottom bit)
|
|
||||||
bne $1, $0, ext_load_s16 # if it is, perform an extended read
|
|
||||||
srl $2, $4, 15 # $1 = page number of address
|
|
||||||
sll $2, $2, 2 # adjust to word index
|
|
||||||
addu $2, $2, $16 # $1 = memory_map_read[address >> 15]
|
|
||||||
lw $1, -32768($2)
|
|
||||||
beq $1, $0, ext_load_s16 # if it's NULL perform an extended read
|
|
||||||
andi $2, $4, 0x7FFF # $2 = low 15bits of address (delay slot)
|
|
||||||
addu $1, $1, $2 # add the memory map offset
|
|
||||||
jr $ra # return
|
|
||||||
lh $2, ($1) # read the value
|
|
||||||
|
|
||||||
ext_load_s16:
|
|
||||||
addiu $sp, $sp, -4 # make room on the stack for $ra
|
|
||||||
sw $ra, ($sp) # store return address
|
|
||||||
save_registers
|
|
||||||
jal read_memory16_signed # read the value
|
|
||||||
nop
|
|
||||||
restore_registers
|
|
||||||
seh $2, $2 # sign extend the return value
|
|
||||||
lw $ra, ($sp) # restore return address
|
|
||||||
jr $ra # return
|
|
||||||
addiu $sp, $sp, 4 # fix stack (delay slot)
|
|
||||||
|
|
||||||
#execute_load_u32:
|
|
||||||
execute_load_full_u32:
|
|
||||||
srl $1, $4, 28 # check if the address is out of range
|
|
||||||
ins $1, $4, 4, 2 # or unaligned (bottom two bits)
|
|
||||||
bne $1, $0, ext_load_u32 # if it is, perform an extended read
|
|
||||||
srl $2, $4, 15 # $1 = page number of address
|
|
||||||
sll $2, $2, 2 # adjust to word index
|
|
||||||
addu $2, $2, $16 # $1 = memory_map_read[address >> 15]
|
|
||||||
lw $1, -32768($2)
|
|
||||||
beq $1, $0, ext_load_u32 # if it's NULL perform an extended read
|
|
||||||
andi $2, $4, 0x7FFF # $2 = low 15bits of address (delay slot)
|
|
||||||
addu $1, $1, $2 # add the memory map offset
|
|
||||||
jr $ra # return
|
|
||||||
lw $2, ($1) # read the value
|
|
||||||
|
|
||||||
ext_load_u32:
|
|
||||||
addiu $sp, $sp, -4 # make room on the stack for $ra
|
|
||||||
sw $ra, ($sp) # store return address
|
|
||||||
save_registers
|
|
||||||
jal read_memory32 # read the value
|
|
||||||
nop
|
|
||||||
restore_registers
|
|
||||||
lw $ra, ($sp) # restore return address
|
|
||||||
jr $ra # return
|
|
||||||
addiu $sp, $sp, 4 # fix stack (delay slot)
|
|
||||||
|
|
||||||
#execute_aligned_load32:
|
|
||||||
srl $2, $4, 28 # check if the address is out of range
|
|
||||||
bne $2, $0, ext_aligned_load32 # if it is, perform an extended load
|
|
||||||
srl $1, $4, 15 # $1 = page number of address
|
|
||||||
sll $1, $1, 2 # adjust to word index
|
|
||||||
addu $1, $1, $16 # $1 = memory_map_read[address >> 15]
|
|
||||||
lw $1, -32768($1)
|
|
||||||
beq $1, $0, ext_aligned_load32 # if it's NULL perform an extended read
|
|
||||||
andi $2, $4, 0x7FFF # $2 = low 15bits of address (delay slot)
|
|
||||||
addu $1, $1, $2 # add the memory map offset
|
|
||||||
jr $ra # return
|
|
||||||
lw $2, ($1) # read the value
|
|
||||||
|
|
||||||
ext_aligned_load32:
|
|
||||||
addiu $sp, $sp, -8 # make room on the stack for $ra
|
|
||||||
sw $6, 4($sp)
|
|
||||||
sw $ra, ($sp) # store return address
|
|
||||||
save_registers
|
|
||||||
jal read_memory32 # read the value
|
|
||||||
nop
|
|
||||||
restore_registers
|
|
||||||
lw $6, 4($sp)
|
|
||||||
lw $ra, ($sp) # restore return address
|
|
||||||
jr $ra # return
|
|
||||||
addiu $sp, $sp, 8 # fix stack (delay slot)
|
|
||||||
|
|
||||||
# General ext memory routines
|
# General ext memory routines
|
||||||
|
|
||||||
ext_store_ignore:
|
ext_store_ignore:
|
||||||
|
|
@ -2804,39 +2608,6 @@ ext_store_u8_jtable:
|
||||||
.long ext_store_ignore # 0x0F invalid
|
.long ext_store_ignore # 0x0F invalid
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
ext_store_u8:
|
|
||||||
srl $1, $4, 24 # $1 = address >> 24
|
|
||||||
sltu $2, $1, 16 # check if the value is out of range
|
|
||||||
beq $2, $0, ext_store_ignore
|
|
||||||
sll $1, $1, 2 # make address word indexed (delay)
|
|
||||||
lui $2, %hi(ext_store_u8_jtable)
|
|
||||||
addu $2, $2, $1
|
|
||||||
# $2 = ext_store_u8_jtable[address >> 24]
|
|
||||||
lw $2, %lo(ext_store_u8_jtable)($2)
|
|
||||||
jr $2 # jump to table location
|
|
||||||
nop
|
|
||||||
|
|
||||||
# $4: address to write to
|
|
||||||
# $5: value to write
|
|
||||||
# $6: current PC
|
|
||||||
|
|
||||||
#execute_store_u8:
|
|
||||||
srl $1, $4, 28 # check if the address is out of range
|
|
||||||
bne $1, $0, ext_store_u8 # if it is, perform an extended write
|
|
||||||
srl $2, $4, 15 # $1 = page number of address (delay slot)
|
|
||||||
sll $2, $2, 2 # adjust to word index
|
|
||||||
addu $2, $2, $16
|
|
||||||
lw $1, 256($2) # $1 = memory_map_write[address >> 15]
|
|
||||||
beq $1, $0, ext_store_u8 # if it's NULL perform an extended write
|
|
||||||
andi $2, $4, 0x7FFF # $2 = low 15bits of address (delay slot)
|
|
||||||
addu $1, $1, $2 # add the memory map offset
|
|
||||||
lb $2, -32768($1) # load the SMC status
|
|
||||||
bne $2, $0, smc_write # is there code there?
|
|
||||||
sb $5, ($1) # store the value (delay slot)
|
|
||||||
jr $ra # return
|
|
||||||
nop
|
|
||||||
|
|
||||||
# 16bit ext memory routines
|
# 16bit ext memory routines
|
||||||
|
|
||||||
ext_store_io16:
|
ext_store_io16:
|
||||||
|
|
@ -2919,39 +2690,6 @@ ext_store_u16_jtable:
|
||||||
.long ext_store_eeprom # 0x0D EEPROM (possibly)
|
.long ext_store_eeprom # 0x0D EEPROM (possibly)
|
||||||
.long ext_store_ignore # 0x0E Flash ROM/SRAM
|
.long ext_store_ignore # 0x0E Flash ROM/SRAM
|
||||||
|
|
||||||
ext_store_u16:
|
|
||||||
srl $1, $4, 24 # $1 = address >> 24
|
|
||||||
sltu $2, $1, 16 # check if the value is out of range
|
|
||||||
beq $2, $0, ext_store_ignore
|
|
||||||
sll $1, $1, 2 # make address word indexed (delay)
|
|
||||||
lui $2, %hi(ext_store_u16_jtable)
|
|
||||||
addu $2, $2, $1
|
|
||||||
# $2 = ext_store_u16_jtable[address >> 24]
|
|
||||||
lw $2, %lo(ext_store_u16_jtable)($2)
|
|
||||||
jr $2 # jump to table location
|
|
||||||
nop
|
|
||||||
|
|
||||||
|
|
||||||
#execute_store_u16:
|
|
||||||
srl $1, $4, 28 # check if the address is out of range
|
|
||||||
bne $1, $0, ext_store_u16 # if it is, perform an extended write
|
|
||||||
srl $2, $4, 15 # $1 = page number of address (delay slot)
|
|
||||||
sll $2, $2, 2 # adjust to word index
|
|
||||||
addu $2, $2, $16
|
|
||||||
lw $1, 256($2) # $1 = memory_map_write[address >> 15]
|
|
||||||
beq $1, $0, ext_store_u16 # if it's NULL perform an extended write
|
|
||||||
andi $2, $4, 0x7FFE # $2 = low 15bits of address (delay slot)
|
|
||||||
addu $1, $1, $2 # add the memory map offset
|
|
||||||
lh $2, -32768($1) # load the SMC status
|
|
||||||
bne $2, $0, smc_write # is there code there?
|
|
||||||
sh $5, ($1) # store the value (delay slot)
|
|
||||||
jr $ra # return
|
|
||||||
nop
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
@ -3030,24 +2768,6 @@ ext_store_u32:
|
||||||
jr $2 # jump to table location
|
jr $2 # jump to table location
|
||||||
nop
|
nop
|
||||||
|
|
||||||
#execute_store_u32:
|
|
||||||
execute_store_full_u32:
|
|
||||||
srl $1, $4, 28 # check if the address is out of range
|
|
||||||
bne $1, $0, ext_store_u32 # if it is, perform an extended write
|
|
||||||
srl $2, $4, 15 # $1 = page number of address (delay slot)
|
|
||||||
sll $2, $2, 2 # adjust to word index
|
|
||||||
addu $2, $2, $16
|
|
||||||
lw $1, 256($2) # $1 = memory_map_write[address >> 15]
|
|
||||||
beq $1, $0, ext_store_u32 # if it's NULL perform an extended write
|
|
||||||
andi $2, $4, 0x7FFC # $2 = low 15bits of address (delay slot)
|
|
||||||
addu $1, $1, $2 # add the memory map offset
|
|
||||||
lw $2, -32768($1) # load the SMC status
|
|
||||||
bne $2, $0, smc_write # is there code there?
|
|
||||||
sw $5, ($1) # store the value (delay slot)
|
|
||||||
jr $ra # return
|
|
||||||
nop
|
|
||||||
|
|
||||||
|
|
||||||
# 32bit ext aligned, non a2 destroying routines
|
# 32bit ext aligned, non a2 destroying routines
|
||||||
|
|
||||||
ext_store_io32a:
|
ext_store_io32a:
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue