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This commit is contained in:
lif 2023-12-27 02:17:32 -08:00
parent 69c145be62
commit f974a8c128
2 changed files with 4 additions and 1 deletions
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3
gpsp_config.h
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@ -11,6 +11,9 @@
#if defined(SMALL_TRANSLATION_CACHE) #if defined(SMALL_TRANSLATION_CACHE)
#define ROM_TRANSLATION_CACHE_SIZE (1024 * 1024 * 2) #define ROM_TRANSLATION_CACHE_SIZE (1024 * 1024 * 2)
#define RAM_TRANSLATION_CACHE_SIZE (1024 * 384) #define RAM_TRANSLATION_CACHE_SIZE (1024 * 384)
#elif defined(N64)
#define ROM_TRANSLATION_CACHE_SIZE (1024 * 1024 * 3)
#define RAM_TRANSLATION_CACHE_SIZE (1024 * 512)
#else #else
#define ROM_TRANSLATION_CACHE_SIZE (1024 * 1024 * 10) #define ROM_TRANSLATION_CACHE_SIZE (1024 * 1024 * 10)
#define RAM_TRANSLATION_CACHE_SIZE (1024 * 512) #define RAM_TRANSLATION_CACHE_SIZE (1024 * 512)

2
mips/mips_emit.h
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@ -2753,7 +2753,7 @@ static void emit_phand(
mips_emit_lw(reg_temp, reg_temp, tbloff2); // Get opcode from 2nd table mips_emit_lw(reg_temp, reg_temp, tbloff2); // Get opcode from 2nd table
mips_emit_sw(reg_temp, mips_reg_ra, -8); // Patch instruction! mips_emit_sw(reg_temp, mips_reg_ra, -8); // Patch instruction!
#if defined(PSP) #if defined(PSP) // || defined(N64) ???
mips_emit_cache(0x1A, mips_reg_ra, -8); mips_emit_cache(0x1A, mips_reg_ra, -8);
mips_emit_jr(reg_rv); // Jump directly to target for speed mips_emit_jr(reg_rv); // Jump directly to target for speed
mips_emit_cache(0x08, mips_reg_ra, -8); mips_emit_cache(0x08, mips_reg_ra, -8);