Minor mips asm cleanup and fixes
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261b2db9bb
commit
f19f1695a6
2 changed files with 6 additions and 21 deletions
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@ -558,9 +558,6 @@ u32 arm_to_mips_reg[] =
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#define generate_shift_right_arithmetic(ireg, imm) \
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#define generate_shift_right_arithmetic(ireg, imm) \
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mips_emit_sra(ireg, ireg, imm) \
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mips_emit_sra(ireg, ireg, imm) \
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#define generate_rotate_right(ireg, imm) \
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mips_emit_rotr(ireg, ireg, imm) \
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#define generate_add(ireg_dest, ireg_src) \
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#define generate_add(ireg_dest, ireg_src) \
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mips_emit_addu(ireg_dest, ireg_dest, ireg_src) \
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mips_emit_addu(ireg_dest, ireg_dest, ireg_src) \
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@ -34,7 +34,6 @@
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.global execute_lsl_flags_reg
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.global execute_lsl_flags_reg
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.global execute_lsr_flags_reg
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.global execute_lsr_flags_reg
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.global execute_asr_flags_reg
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.global execute_asr_flags_reg
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.global execute_ror_flags_reg
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.global execute_arm_translate_internal
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.global execute_arm_translate_internal
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.global icache_region_sync
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.global icache_region_sync
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.global reg_check
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.global reg_check
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@ -283,7 +282,7 @@ return_to_main:
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lw $fp, 32($sp)
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lw $fp, 32($sp)
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lw $ra, 36($sp)
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lw $ra, 36($sp)
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jr $ra # Return to main
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jr $ra # Return to main
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add $sp, $sp, 48 # Restore stack pointer (delay slot)
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addiu $sp, $sp, 48 # Restore stack pointer (delay slot)
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# Perform an indirect branch.
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# Perform an indirect branch.
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@ -513,11 +512,11 @@ lsl_shift_high:
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bne $1, $0, lsl_shift_done # jump if shift == 32
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bne $1, $0, lsl_shift_done # jump if shift == 32
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andi $22, $4, 1 # c flag = value & 0x01 (delay)
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andi $22, $4, 1 # c flag = value & 0x01 (delay)
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add $22, $0, $0 # c flag = 0 otherwise
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addu $22, $0, $0 # c flag = 0 otherwise
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lsl_shift_done:
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lsl_shift_done:
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jr $ra # return
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jr $ra # return
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add $4, $0, $0 # value = 0 no matter what
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addu $4, $0, $0 # value = 0 no matter what
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execute_lsr_flags_reg:
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execute_lsr_flags_reg:
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@ -538,11 +537,11 @@ lsr_shift_high:
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bne $1, $0, lsr_shift_done # jump if shift == 32
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bne $1, $0, lsr_shift_done # jump if shift == 32
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srl $22, $4, 31 # c flag = value >> 31 (delay)
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srl $22, $4, 31 # c flag = value >> 31 (delay)
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add $22, $0, $0 # c flag = 0 otherwise
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addu $22, $0, $0 # c flag = 0 otherwise
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lsr_shift_done:
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lsr_shift_done:
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jr $ra # return
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jr $ra # return
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add $4, $0, $0 # value = 0 no matter what
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addu $4, $0, $0 # value = 0 no matter what
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execute_asr_flags_reg:
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execute_asr_flags_reg:
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@ -564,22 +563,11 @@ asr_shift_high:
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andi $22, $4, 1 # c flag = value & 0x01
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andi $22, $4, 1 # c flag = value & 0x01
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execute_ror_flags_reg:
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beq $5, $0, ror_zero_shift # is the shift zero?
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addiu $1, $5, -1 # $1 = (shift - 1) (delay)
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srav $1, $4, $1 # $1 = (value >> (shift - 1))
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andi $22, $1, 1 # c flag = $1 & 1
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ror_zero_shift:
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jr $ra # return
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rotrv $4, $4, $5 # return (value ror shift) delay
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# $4: cycle counter argument
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# $4: cycle counter argument
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# $5: pointer to reg
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# $5: pointer to reg
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execute_arm_translate_internal:
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execute_arm_translate_internal:
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add $sp, $sp, -48 # Store the main thread context
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addiu $sp, $sp, -48 # Store the main thread context
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sw $s0, 0($sp)
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sw $s0, 0($sp)
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sw $s1, 4($sp)
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sw $s1, 4($sp)
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sw $s2, 8($sp)
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sw $s2, 8($sp)
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