Rework I/O mappings
Mirrors exist at 64KB boundary (not 0x400) but works nevertheless
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7ba465089c
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81
gba_memory.c
81
gba_memory.c
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@ -20,7 +20,7 @@
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#include "common.h"
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/* Sound */
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#define gbc_sound_tone_control_low(channel, address) \
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#define gbc_sound_tone_control_low(channel, regn) \
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{ \
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u32 initial_volume = (value >> 12) & 0x0F; \
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u32 envelope_ticks = ((value >> 8) & 0x07) * 4; \
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@ -34,10 +34,10 @@
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gbc_sound_channel[channel].envelope_status = (envelope_ticks != 0); \
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gbc_sound_channel[channel].envelope_volume = initial_volume; \
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gbc_sound_update = 1; \
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address16(io_registers, address) = eswap16(value); \
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write_ioreg(regn, value); \
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} \
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#define gbc_sound_tone_control_high(channel, address) \
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#define gbc_sound_tone_control_high(channel, regn) \
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{ \
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u32 rate = value & 0x7FF; \
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gbc_sound_channel[channel].rate = rate; \
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@ -55,7 +55,7 @@
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} \
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\
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gbc_sound_update = 1; \
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address16(io_registers, address) = eswap16(value); \
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write_ioreg(regn, value); \
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} \
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#define gbc_sound_tone_control_sweep() \
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@ -196,8 +196,8 @@ static void sound_control_x(u32 value)
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sound_on = 0;
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}
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address16(io_registers, 0x84) = eswap16(
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(readaddress16(io_registers, 0x84) & 0x000F) | (value & 0xFFF0));
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value = (value & 0xFFF0) | (read_ioreg(REG_SOUNDCNT_X) & 0x000F);
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write_ioreg(REG_SOUNDCNT_X, value);
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}
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#define sound_update_frequency_step(timer_number) \
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@ -308,7 +308,7 @@ u32 gamepak_waitstate_sequential[2][3][3] =
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}
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};
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u16 io_registers[1024 * 16];
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u16 io_registers[512];
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u8 bios_rom[1024 * 16];
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u32 bios_read_protect;
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@ -901,45 +901,45 @@ cpu_alert_type function_cc write_io_register8(u32 address, u32 value)
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// Sound 1 control duty/length/envelope
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case 0x62:
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access_register8_low(0x62);
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gbc_sound_tone_control_low(0, 0x62);
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gbc_sound_tone_control_low(0, REG_SOUND1CNT_H);
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break;
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case 0x63:
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access_register8_high(0x62);
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gbc_sound_tone_control_low(0, 0x62);
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gbc_sound_tone_control_low(0, REG_SOUND1CNT_H);
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break;
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// Sound 1 control frequency
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case 0x64:
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access_register8_low(0x64);
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gbc_sound_tone_control_high(0, 0x64);
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gbc_sound_tone_control_high(0, REG_SOUND1CNT_X);
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break;
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case 0x65:
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access_register8_high(0x64);
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gbc_sound_tone_control_high(0, 0x64);
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gbc_sound_tone_control_high(0, REG_SOUND1CNT_X);
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break;
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// Sound 2 control duty/length/envelope
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case 0x68:
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access_register8_low(0x68);
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gbc_sound_tone_control_low(1, 0x68);
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gbc_sound_tone_control_low(1, REG_SOUND2CNT_L);
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break;
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case 0x69:
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access_register8_high(0x68);
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gbc_sound_tone_control_low(1, 0x68);
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gbc_sound_tone_control_low(1, REG_SOUND2CNT_L);
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break;
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// Sound 2 control frequency
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case 0x6C:
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access_register8_low(0x6C);
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gbc_sound_tone_control_high(1, 0x6C);
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gbc_sound_tone_control_high(1, REG_SOUND2CNT_H);
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break;
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case 0x6D:
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access_register8_high(0x6C);
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gbc_sound_tone_control_high(1, 0x6C);
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gbc_sound_tone_control_high(1, REG_SOUND2CNT_H);
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break;
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// Sound 3 control wave
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@ -978,12 +978,12 @@ cpu_alert_type function_cc write_io_register8(u32 address, u32 value)
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// Sound 4 control length/envelope
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case 0x78:
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access_register8_low(0x78);
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gbc_sound_tone_control_low(3, 0x78);
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gbc_sound_tone_control_low(3, REG_SOUND4CNT_L);
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break;
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case 0x79:
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access_register8_high(0x78);
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gbc_sound_tone_control_low(3, 0x78);
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gbc_sound_tone_control_low(3, REG_SOUND4CNT_L);
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break;
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// Sound 4 control frequency
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@ -1025,22 +1025,7 @@ cpu_alert_type function_cc write_io_register8(u32 address, u32 value)
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break;
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// Sound wave RAM
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case 0x90:
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case 0x91:
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case 0x92:
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case 0x93:
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case 0x94:
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case 0x95:
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case 0x96:
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case 0x97:
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case 0x98:
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case 0x99:
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case 0x9A:
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case 0x9B:
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case 0x9C:
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case 0x9D:
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case 0x9E:
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case 0x9F:
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case 0x90 ... 0x9F:
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gbc_sound_wave_update = 1;
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address8(io_registers, address) = value;
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break;
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@ -1245,22 +1230,22 @@ cpu_alert_type function_cc write_io_register16(u32 address, u32 value)
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// Sound 1 control duty/length/envelope
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case 0x62:
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gbc_sound_tone_control_low(0, 0x62);
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gbc_sound_tone_control_low(0, REG_SOUND1CNT_H);
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break;
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// Sound 1 control frequency
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case 0x64:
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gbc_sound_tone_control_high(0, 0x64);
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gbc_sound_tone_control_high(0, REG_SOUND1CNT_X);
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break;
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// Sound 2 control duty/length/envelope
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case 0x68:
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gbc_sound_tone_control_low(1, 0x68);
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gbc_sound_tone_control_low(1, REG_SOUND2CNT_L);
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break;
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// Sound 2 control frequency
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case 0x6C:
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gbc_sound_tone_control_high(1, 0x6C);
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gbc_sound_tone_control_high(1, REG_SOUND2CNT_H);
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break;
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// Sound 3 control wave
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@ -1280,7 +1265,7 @@ cpu_alert_type function_cc write_io_register16(u32 address, u32 value)
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// Sound 4 control length/envelope
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case 0x78:
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gbc_sound_tone_control_low(3, 0x78);
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gbc_sound_tone_control_low(3, REG_SOUND4CNT_L);
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break;
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// Sound 4 control frequency
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@ -1304,21 +1289,7 @@ cpu_alert_type function_cc write_io_register16(u32 address, u32 value)
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break;
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// Sound wave RAM
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case 0x90:
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case 0x91:
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case 0x92:
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case 0x93:
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case 0x94:
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case 0x95:
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case 0x96:
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case 0x97:
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case 0x98:
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case 0x99:
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case 0x9A:
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case 0x9B:
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case 0x9C:
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case 0x9D:
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case 0x9E:
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case 0x90 ... 0x9E:
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gbc_sound_wave_update = 1;
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address16(io_registers, address) = eswap16(value);
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break;
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@ -2460,7 +2431,7 @@ dma_region_type dma_region_map[16] =
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}
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#define dma_read_io(type, transfer_size) \
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read_value = readaddress##transfer_size(io_registers, type##_ptr & 0x7FFF) \
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read_value = readaddress##transfer_size(io_registers, type##_ptr & 0x3FF) \
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#define dma_read_oam_ram(type, transfer_size) \
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read_value = readaddress##transfer_size(oam_ram, type##_ptr & 0x3FF) \
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@ -3230,7 +3201,7 @@ void memory_##type##_savestate(void) \
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state_mem_##type(vram, 0x18000); \
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state_mem_##type(oam_ram, 0x400); \
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state_mem_##type(palette_ram, 0x400); \
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state_mem_##type(io_registers, 0x8000); \
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state_mem_##type(io_registers, 0x400); \
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\
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/* This should not happen anymore :P */ \
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if((flash_bank_ptr < gamepak_backup) || \
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@ -122,11 +122,16 @@ typedef enum
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REG_BLDCNT = 0x28,
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REG_BLDALPHA = 0x29,
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REG_BLDY = 0x2A,
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// Sound control registers
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REG_SOUND1CNT_L = 0x30,
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REG_SOUND1CNT_H = 0x31,
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REG_SOUND1CNT_X = 0x32,
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REG_SOUND2CNT_L = 0x34,
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REG_SOUND2CNT_H = 0x36,
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REG_SOUND3CNT_L = 0x38,
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REG_SOUND3CNT_H = 0x39,
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REG_SOUND3CNT_X = 0x3A,
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REG_SOUND4CNT_L = 0x3C,
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REG_SOUND4CNT_H = 0x3E,
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REG_SOUNDCNT_L = 0x40,
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REG_SOUNDCNT_H = 0x41,
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@ -215,7 +220,7 @@ extern u32 bios_read_protect;
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extern u16 palette_ram[512];
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extern u16 oam_ram[512];
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extern u16 palette_ram_converted[512];
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extern u16 io_registers[1024 * 16];
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extern u16 io_registers[512];
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extern u8 vram[1024 * 96];
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extern u8 bios_rom[1024 * 16];
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// Double buffer used for SMC detection
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