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[aarch64] Fix cache flushing out of bounds

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Seems like some platforms don't like this very much :|
This commit is contained in:
David Guillen Fandos 2021-12-13 18:54:21 +01:00
parent 76ccba445f
commit c6601d8932
2 changed files with 2 additions and 1 deletions
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2
arm/arm64_emit.h
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@ -1861,7 +1861,7 @@ extern void* ldst_lookup_tables[16*4 + 17*6];
void init_emitter() { void init_emitter() {
rom_cache_watermark = 0; rom_cache_watermark = INITIAL_ROM_WATERMARK;
init_bios_hooks(); init_bios_hooks();
// Generate handler table // Generate handler table

1
cpu_threaded.c
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@ -3424,6 +3424,7 @@ void init_bios_hooks(void)
// Pre-generate this entry point so that we can safely invoke fast // Pre-generate this entry point so that we can safely invoke fast
// SWI calls from ROM and RAM regardless of cache flushes. // SWI calls from ROM and RAM regardless of cache flushes.
rom_translation_ptr = &rom_translation_cache[rom_cache_watermark]; rom_translation_ptr = &rom_translation_cache[rom_cache_watermark];
last_rom_translation_ptr = rom_translation_ptr;
bios_swi_entrypoint = block_lookup_address_arm(0x8); bios_swi_entrypoint = block_lookup_address_arm(0x8);
rom_cache_watermark = (u32)(rom_translation_ptr - rom_translation_cache); rom_cache_watermark = (u32)(rom_translation_ptr - rom_translation_cache);
} }