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Move membuffers close to dynarec area to fix x86 relocs 

This essentially makes it easier to get a relocation-free text area for
x86 so that Android loaders are happy.
This commit is contained in:
David Guillen Fandos 2021-07-28 19:12:43 +02:00
parent dec6f50d89
commit ab7d9bb161
7 changed files with 151 additions and 112 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
arm/arm_stub.S
View File

@ -850,8 +850,14 @@ execute_load_builder(u16, 1, read_memory16)
execute_load_builder(s16, 1, read_memory16s)
execute_load_builder(u32, 2, read_memory32)
.data
.bss
defsymbl(iwram)
.space 0x10000
defsymbl(vram)
.space 0x18000
defsymbl(ewram)
.space 0x80000
defsymbl(memory_map_read)
.space 0x8000
defsymbl(palette_ram)
@ -866,7 +872,7 @@ defsymbl(reg_mode)
defsymbl(oam_ram)
.space 0x400
defsymbl(reg)
.space 0x100, 0
.space 0x100
@ Vita and 3DS (and of course mmap) map their own cache sections through some
@ platform-speficic mechanisms.

31
cpu.c
View File

@ -1520,7 +1520,7 @@ const u32 psr_masks[16] =
// reg_mode[new_mode][6]. When swapping to/from FIQ retire/load reg[8]
// through reg[14] to/from reg_mode[MODE_FIQ][0] through reg_mode[MODE_FIQ][6].
u32 cpu_modes[32] =
const u32 cpu_modes[32] =
{
MODE_INVALID, MODE_INVALID, MODE_INVALID, MODE_INVALID, MODE_INVALID,
MODE_INVALID, MODE_INVALID, MODE_INVALID, MODE_INVALID, MODE_INVALID,
@ -1531,17 +1531,6 @@ u32 cpu_modes[32] =
MODE_USER
};
u32 cpu_modes_cpsr[7] = { 0x10, 0x11, 0x12, 0x13, 0x17, 0x1B, 0x1F };
// When switching modes set spsr[new_mode] to cpsr. Modifying PC as the
// target of a data proc instruction will set cpsr to spsr[cpu_mode].
#ifndef HAVE_DYNAREC
u32 reg[64];
u32 spsr[6];
u32 reg_mode[7][7];
#endif
// ARM/Thumb mode is stored in the flags directly, this is simpler than
// shadowing it since it has a constant 1bit represenation.
@ -1611,10 +1600,20 @@ void raise_interrupt(irq_type irq_raised)
}
#ifndef HAVE_DYNAREC
// When switching modes set spsr[new_mode] to cpsr. Modifying PC as the
// target of a data proc instruction will set cpsr to spsr[cpu_mode].
u32 reg[64];
u32 spsr[6];
u32 reg_mode[7][7];
u8 *memory_map_read [8 * 1024];
u16 oam_ram[512];
u16 palette_ram[512];
u16 palette_ram_converted[512];
u8 ewram[1024 * 256 * 2];
u8 iwram[1024 * 32 * 2];
u8 vram[1024 * 96];
#endif
void execute_arm(u32 cycles)
@ -3752,10 +3751,10 @@ thumb_loop:
void init_cpu(void)
{
u32 i;
for(i = 0; i < 16; i++)
reg[i] = 0;
// Initialize CPU registers
memset(reg, 0, sizeof(reg));
memset(reg_mode, 0, sizeof(reg_mode));
memset(spsr, 0, sizeof(spsr));
reg[CPU_HALT_STATE] = CPU_ACTIVE;
reg[CHANGED_PC_STATUS] = 0;

2
cpu.h
View File

@ -161,7 +161,7 @@ void init_emitter(void);
extern u32 reg_mode[7][7];
extern u32 spsr[6];
extern u32 cpu_modes[32];
extern const u32 cpu_modes[32];
extern const u32 psr_masks[16];
extern u32 memory_region_access_read_u8[16];

3
gba_memory.c
View File

@ -309,9 +309,6 @@ u32 gamepak_waitstate_sequential[2][3][3] =
};
u16 io_registers[1024 * 16];
u8 ewram[1024 * 256 * 2];
u8 iwram[1024 * 32 * 2];
u8 vram[1024 * 96];
u8 bios_rom[1024 * 16];
u32 bios_read_protect;

9
psp/mips_stub.S
View File

@ -609,6 +609,15 @@ defsymbl(execute_arm_translate_internal)
jr $2 # jump to return
nop
.bss
.align 6
defsymbl(iwram)
.space 0x10000
defsymbl(vram)
.space 0x18000
defsymbl(ewram)
.space 0x80000
.data
.align 6

13
x86/x86_emit.h
View File

@ -2326,6 +2326,17 @@ void function_cc swi_hle_div(void)
generate_update_pc(pc); \
generate_indirect_branch_no_cycle_update(type) \
void init_emitter(void) {}
extern u32 x86_table_data[3][16];
extern u32 x86_table_info[3][16];
void init_emitter(void) {
memcpy(x86_table_info, x86_table_data, sizeof(x86_table_data));
}
u32 function_cc execute_arm_translate_internal(u32 cycles, void *regptr);
u32 function_cc execute_arm_translate(u32 cycles) {
return execute_arm_translate_internal(cycles, &reg[0]);
}
#endif

195
x86/x86_stub.S
View File

@ -28,10 +28,6 @@ _##symbol:
#ifndef _WIN32
# External symbols (data + functions)
#define _iwram iwram
#define _ewram ewram
#define _vram vram
#define _update_gba update_gba
#define _block_lookup_address_arm block_lookup_address_arm
#define _block_lookup_address_thumb block_lookup_address_thumb
@ -46,10 +42,6 @@ _##symbol:
#define _execute_store_cpsr_body execute_store_cpsr_body
#endif
.global _iwram
.global _ewram
.global _vram
.extern _spsr
.equ REG_SP, (13 * 4)
@ -69,6 +61,16 @@ _##symbol:
.equ COMPLETED_FRAME, (32 * 4)
.equ OAM_UPDATED, (33 * 4)
.equ ESTORE_U32_TBL, -(16 * 4)
.equ ESTORE_U16_TBL, -(32 * 4)
.equ ESTORE_U8_TBL, -(48 * 4)
.equ PALETTE_RAM_OFF, 0x0100
.equ PALETTE_RAM_CNV_OFF, 0x0500
.equ OAM_RAM_OFF, 0x0900
.equ IWRAM_OFF, 0x0D00
.equ VRAM_OFF, 0x10D00
.equ EWRAM_OFF, 0x28D00
# destroys ecx and edx
.macro collapse_flag offset, shift
@ -199,16 +201,16 @@ ext_store_eeprom:
# 8bit ext memory routines
ext_store_iwram8:
and $0x7FFF, %eax # wrap around address
mov %dl, (_iwram+0x8000)(%eax) # perform store
cmpb $0, _iwram(%eax) # Check SMC mirror
and $0x7FFF, %eax # wrap around address
mov %dl, (IWRAM_OFF+0x8000)(%ebx, %eax) # perform store
cmpb $0, IWRAM_OFF(%ebx, %eax) # Check SMC mirror
jne smc_write
ret
ext_store_ewram8:
and $0x3FFFF, %eax # wrap around address
mov %dl, _ewram(%eax) # perform store
cmpb $0, (_ewram+0x40000)(%eax) # Check SMC mirror
mov %dl, EWRAM_OFF(%ebx, %eax) # perform store
cmpb $0, (EWRAM_OFF+0x40000)(%ebx, %eax) # Check SMC mirror
jne smc_write
ret
@ -230,14 +232,14 @@ ext_store_vram8:
sub $0x8000, %eax # if so wrap down
ext_store_vram8b:
mov %dx, _vram(%eax) # perform 16bit store
mov %dx, VRAM_OFF(%ebx, %eax) # perform 16bit store
ret
ext_store_oam8:
movl $1, OAM_UPDATED(%ebx) # flag OAM update
and $0x3FE, %eax # wrap around address and align to 16bits
mov %dl, %dh # copy lower 8bits of value into full 16bits
mov %dx, _oam_ram(%eax) # perform 16bit store
mov %dx, OAM_RAM_OFF(%ebx, %eax) # perform 16bit store
ret
ext_store_backup:
@ -245,23 +247,6 @@ ext_store_backup:
and $0xFFFF, %eax # mask address
jmp _write_backup # perform backup write
ext_store_u8_jtable:
.long ext_store_ignore # 0x00 BIOS, ignore
.long ext_store_ignore # 0x01 invalid, ignore
.long ext_store_ewram8 # 0x02 EWRAM
.long ext_store_iwram8 # 0x03 IWRAM
.long ext_store_io8 # 0x04 I/O registers
.long ext_store_palette8 # 0x05 Palette RAM
.long ext_store_vram8 # 0x06 VRAM
.long ext_store_oam8 # 0x07 OAM RAM
.long ext_store_ignore # 0x08 gamepak (no RTC accepted in 8bit)
.long ext_store_ignore # 0x09 gamepak, ignore
.long ext_store_ignore # 0x0A gamepak, ignore
.long ext_store_ignore # 0x0B gamepak, ignore
.long ext_store_ignore # 0x0C gamepak, ignore
.long ext_store_eeprom # 0x0D EEPROM (possibly)
.long ext_store_backup # 0x0E Flash ROM/SRAM
# eax: address to write to
# edx: value to write
# ecx: current pc
@ -273,22 +258,23 @@ defsymbl(execute_store_u8)
cmp $15, %ecx
ja ext_store_ignore
# ecx = ext_store_u8_jtable[address >> 24]
mov ext_store_u8_jtable(, %ecx, 4), %ecx
mov ESTORE_U8_TBL(%ebx, %ecx, 4), %ecx
jmp *%ecx # jump to table index
# 16bit ext memory routines
ext_store_iwram16:
and $0x7FFF, %eax # wrap around address
mov %dx, (_iwram+0x8000)(%eax) # perform store
cmpw $0, _iwram(%eax) # Check SMC mirror
mov %dx, (IWRAM_OFF+0x8000)(%ebx, %eax) # perform store
cmpw $0, IWRAM_OFF(%ebx, %eax) # Check SMC mirror
jne smc_write
ret
ext_store_ewram16:
and $0x3FFFF, %eax # wrap around address
mov %dx, _ewram(%eax) # perform store
cmpw $0, (_ewram+0x40000)(%eax) # Check SMC mirror
mov %dx, EWRAM_OFF(%ebx, %eax) # perform store
cmpw $0, (EWRAM_OFF+0x40000)(%ebx, %eax) # Check SMC mirror
jne smc_write
ret
@ -302,7 +288,7 @@ ext_store_palette16:
and $0x3FF, %eax # wrap around address
ext_store_palette16b: # entry point for 8bit write
mov %dx, _palette_ram(%eax) # write out palette value
mov %dx, PALETTE_RAM_OFF(%ebx, %eax) # write out palette value
mov %edx, %ecx # cx = dx
shl $11, %ecx # cx <<= 11 (red component is in high bits)
mov %dh, %cl # bottom bits of cx = top bits of dx
@ -311,7 +297,7 @@ ext_store_palette16b: # entry point for 8bit write
shl $1, %dx # make green component 6bits
or %edx, %ecx # combine green component into ecx
# write out the freshly converted palette value
mov %cx, _palette_ram_converted(%eax)
mov %cx, PALETTE_RAM_CNV_OFF(%ebx, %eax)
ret # done
ext_store_vram16:
@ -321,13 +307,13 @@ ext_store_vram16:
sub $0x8000, %eax # if so wrap down
ext_store_vram16b:
mov %dx, _vram(%eax) # perform 16bit store
mov %dx, VRAM_OFF(%ebx, %eax) # perform 16bit store
ret
ext_store_oam16:
movl $1, OAM_UPDATED(%ebx) # flag OAM update
and $0x3FF, %eax # wrap around address
mov %dx, _oam_ram(%eax) # perform 16bit store
mov %dx, OAM_RAM_OFF(%ebx, %eax) # perform 16bit store
ret
ext_store_rtc:
@ -335,23 +321,6 @@ ext_store_rtc:
and $0xFF, %eax # mask address
jmp _write_rtc # write out RTC register
ext_store_u16_jtable:
.long ext_store_ignore # 0x00 BIOS, ignore
.long ext_store_ignore # 0x01 invalid, ignore
.long ext_store_ewram16 # 0x02 EWRAM
.long ext_store_iwram16 # 0x03 IWRAM
.long ext_store_io16 # 0x04 I/O registers
.long ext_store_palette16 # 0x05 Palette RAM
.long ext_store_vram16 # 0x06 VRAM
.long ext_store_oam16 # 0x07 OAM RAM
.long ext_store_rtc # 0x08 gamepak or RTC
.long ext_store_ignore # 0x09 gamepak, ignore
.long ext_store_ignore # 0x0A gamepak, ignore
.long ext_store_ignore # 0x0B gamepak, ignore
.long ext_store_ignore # 0x0C gamepak, ignore
.long ext_store_eeprom # 0x0D EEPROM (possibly)
.long ext_store_ignore # 0x0E Flash ROM/SRAM must be 8bit
defsymbl(execute_store_u16)
mov %ecx, REG_PC(%ebx) # write out the PC
and $~0x01, %eax # fix alignment
@ -360,23 +329,23 @@ defsymbl(execute_store_u16)
cmp $15, %ecx
ja ext_store_ignore
# ecx = ext_store_u16_jtable[address >> 24]
mov ext_store_u16_jtable(, %ecx, 4), %ecx
mov ESTORE_U16_TBL(%ebx, %ecx, 4), %ecx
jmp *%ecx # jump to table index
# 32bit ext memory routines
ext_store_iwram32:
and $0x7FFF, %eax # wrap around address
mov %edx, (_iwram+0x8000)(%eax) # perform store
cmpl $0, _iwram(%eax) # Check SMC mirror
mov %edx, (IWRAM_OFF+0x8000)(%ebx, %eax) # perform store
cmpl $0, IWRAM_OFF(%ebx, %eax) # Check SMC mirror
jne smc_write
ret
ext_store_ewram32:
and $0x3FFFF, %eax # wrap around address
mov %edx, _ewram(%eax) # perform store
cmpl $0, (_ewram+0x40000)(%eax) # Check SMC mirror
mov %edx, EWRAM_OFF(%ebx, %eax) # perform store
cmpl $0, (EWRAM_OFF+0x40000)(%ebx, %eax) # Check SMC mirror
jne smc_write
ret
@ -399,33 +368,15 @@ ext_store_vram32:
sub $0x8000, %eax # if so wrap down
ext_store_vram32b:
mov %edx, _vram(%eax) # perform 32bit store
mov %edx, VRAM_OFF(%ebx, %eax) # perform 32bit store
ret
ext_store_oam32:
movl $1, OAM_UPDATED(%ebx) # flag OAM update
and $0x3FF, %eax # wrap around address
mov %edx, _oam_ram(%eax) # perform 32bit store
mov %edx, OAM_RAM_OFF(%ebx, %eax) # perform 32bit store
ret
ext_store_u32_jtable:
.long ext_store_ignore # 0x00 BIOS, ignore
.long ext_store_ignore # 0x01 invalid, ignore
.long ext_store_ewram32 # 0x02 EWRAM
.long ext_store_iwram32 # 0x03 IWRAM
.long ext_store_io32 # 0x04 I/O registers
.long ext_store_palette32 # 0x05 Palette RAM
.long ext_store_vram32 # 0x06 VRAM
.long ext_store_oam32 # 0x07 OAM RAM
.long ext_store_ignore # 0x08 gamepak, ignore (no RTC in 32bit)
.long ext_store_ignore # 0x09 gamepak, ignore
.long ext_store_ignore # 0x0A gamepak, ignore
.long ext_store_ignore # 0x0B gamepak, ignore
.long ext_store_ignore # 0x0C gamepak, ignore
.long ext_store_eeprom # 0x0D EEPROM (possibly)
.long ext_store_ignore # 0x0E Flash ROM/SRAM must be 8bit
defsymbl(execute_store_u32)
mov %ecx, REG_PC(%ebx) # write out the PC
and $~0x03, %eax # fix alignment
@ -434,7 +385,7 @@ defsymbl(execute_store_u32)
cmp $15, %ecx
ja ext_store_ignore
# ecx = ext_store_u32_jtable[address >> 24]
mov ext_store_u32_jtable(, %ecx, 4), %ecx
movl ESTORE_U32_TBL(%ebx, %ecx, 4), %ecx
jmp *%ecx
# %eax = new_cpsr
@ -485,16 +436,16 @@ lookup_pc_arm:
# eax: cycle counter
defsymbl(execute_arm_translate)
defsymbl(execute_arm_translate_internal)
# Save main context, since we need to return gracefully
pushl %ebx
pushl %esi
pushl %edi
pushl %ebp
movl $_reg, %ebx # load base register
movl %edx, %ebx # load base register (arg1)
extract_flags # load flag variables
movl %eax, %edi # load edi cycle counter
movl %eax, %edi # load edi cycle counter (arg0)
movl REG_PC(%ebx), %eax # load PC
@ -524,21 +475,87 @@ return_to_main:
ret
.data
defsymbl(x86_table_data)
ext_store_u8_jtable:
.long ext_store_ignore # 0x00 BIOS, ignore
.long ext_store_ignore # 0x01 invalid, ignore
.long ext_store_ewram8 # 0x02 EWRAM
.long ext_store_iwram8 # 0x03 IWRAM
.long ext_store_io8 # 0x04 I/O registers
.long ext_store_palette8 # 0x05 Palette RAM
.long ext_store_vram8 # 0x06 VRAM
.long ext_store_oam8 # 0x07 OAM RAM
.long ext_store_ignore # 0x08 gamepak (no RTC accepted in 8bit)
.long ext_store_ignore # 0x09 gamepak, ignore
.long ext_store_ignore # 0x0A gamepak, ignore
.long ext_store_ignore # 0x0B gamepak, ignore
.long ext_store_ignore # 0x0C gamepak, ignore
.long ext_store_eeprom # 0x0D EEPROM (possibly)
.long ext_store_backup # 0x0E Flash ROM/SRAM
.long ext_store_ignore # 0x0F ignore
ext_store_u16_jtable:
.long ext_store_ignore # 0x00 BIOS, ignore
.long ext_store_ignore # 0x01 invalid, ignore
.long ext_store_ewram16 # 0x02 EWRAM
.long ext_store_iwram16 # 0x03 IWRAM
.long ext_store_io16 # 0x04 I/O registers
.long ext_store_palette16 # 0x05 Palette RAM
.long ext_store_vram16 # 0x06 VRAM
.long ext_store_oam16 # 0x07 OAM RAM
.long ext_store_rtc # 0x08 gamepak or RTC
.long ext_store_ignore # 0x09 gamepak, ignore
.long ext_store_ignore # 0x0A gamepak, ignore
.long ext_store_ignore # 0x0B gamepak, ignore
.long ext_store_ignore # 0x0C gamepak, ignore
.long ext_store_eeprom # 0x0D EEPROM (possibly)
.long ext_store_ignore # 0x0E Flash ROM/SRAM must be 8bit
.long ext_store_ignore # 0x0F ignore
ext_store_u32_jtable:
.long ext_store_ignore # 0x00 BIOS, ignore
.long ext_store_ignore # 0x01 invalid, ignore
.long ext_store_ewram32 # 0x02 EWRAM
.long ext_store_iwram32 # 0x03 IWRAM
.long ext_store_io32 # 0x04 I/O registers
.long ext_store_palette32 # 0x05 Palette RAM
.long ext_store_vram32 # 0x06 VRAM
.long ext_store_oam32 # 0x07 OAM RAM
.long ext_store_ignore # 0x08 gamepak, ignore (no RTC in 32bit)
.long ext_store_ignore # 0x09 gamepak, ignore
.long ext_store_ignore # 0x0A gamepak, ignore
.long ext_store_ignore # 0x0B gamepak, ignore
.long ext_store_ignore # 0x0C gamepak, ignore
.long ext_store_eeprom # 0x0D EEPROM (possibly)
.long ext_store_ignore # 0x0E Flash ROM/SRAM must be 8bit
.long ext_store_ignore # 0x0F ignore
.bss
.align 64
defsymbl(x86_table_info)
.space 3*4*16
defsymbl(reg)
.space 0x100, 0
.space 0x100
defsymbl(palette_ram)
.space 0x400
defsymbl(palette_ram_converted)
.space 0x400
defsymbl(oam_ram)
.space 0x400
defsymbl(iwram)
.space 0x10000
defsymbl(vram)
.space 0x18000
defsymbl(ewram)
.space 0x80000
defsymbl(spsr)
.space 24
defsymbl(reg_mode)
.space 196
defsymbl(memory_map_read)
.space 0x8000