Merge pull request #95 from davidgfnet/master

Remove more dead code
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Autechre 2021-02-26 19:21:59 +01:00 committed by GitHub
commit a78ef12b82
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1 changed files with 2 additions and 295 deletions

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@ -2471,12 +2471,6 @@ patch_store_u32a:
patch_handler store_u32a_ftable, 0x0F
# General ext memory routines
ext_store_ignore:
jr $ra # ignore these writes
nop
write_io_epilogue:
beq $2, $0, no_alert # 0 means nothing happened
addiu $4, $2, -2 # see if return value is 2 (delay slot)
@ -2487,6 +2481,8 @@ write_io_epilogue:
nop
collapse_flags # make sure flags are good for update_gba
alert_loop:
jal update_gba # process the next event
nop
@ -2518,295 +2514,6 @@ smc_dma:
j lookup_pc
nop
ext_store_eeprom:
addiu $sp, $sp, -4 # make room on the stack for $ra
sw $ra, ($sp)
save_registers
jal write_eeprom # write the value out
sw $6, REG_PC($16) # save the PC (delay slot)
restore_registers
lw $ra, ($sp) # restore return address
jr $ra # we can return
addiu $sp, $sp, 4 # fix the stack
# 8bit ext memory routines
ext_store_io8:
andi $5, $5, 0xFF # make value 8bit
andi $4, $4, 0x3FF # wrap around address
addiu $sp, $sp, -4 # make room on the stack for $ra
sw $ra, ($sp)
save_registers
jal write_io_register8 # write the value out
sw $6, REG_PC($16) # save the PC (delay slot)
j write_io_epilogue # handle any state changes
nop
ext_store_palette8:
j ext_store_palette16b # perform 16bit palette write
andi $4, $4, 0x3FE # wrap + align (delay)
ext_store_vram8:
ins $5, $5, 8, 8 # value = (value << 8) | value
ext $4, $4, 0, 17 # address = adress & 0x1FFFF
ins $4, $0, 0, 1 # align out bottom bit
lui $1, %hi(0x18000) # $1 = 0x18000
sltu $1, $4, $1 # see if address < 0x18000
bne $1, $0, ext_store_vram8b
lui $2, %hi(vram) # start loading vram address (delay)
addiu $4, $4, -0x8000 # move address into VRAM region
ext_store_vram8b:
addu $2, $2, $4 # $2 = (hi)vram + address
jr $ra # return
sh $5, %lo(vram)($2) # vram[address] = value (delay)
ext_store_oam8:
lui $1, %hi(oam_update) # $1 = oam_update
addiu $1, %lo(oam_update)
li $2, 1 # $2 = 1
sw $2, ($1) # *oam_update = 1
andi $4, $4, 0x3FE # wrap around address and align to 16bits
ins $5, $5, 8, 8 # value = (value << 8) | value
lui $1, %hi(oam_ram) # $1 = (hi)oam_ram
addu $1, $1, $4 # $1 = (hi)oam_ram + address
jr $ra # return
sh $5, %lo(oam_ram)($1) # oam_ram[address] = value (delay)
ext_store_backup:
andi $5, $5, 0xFF # make value 8bit
andi $4, $4, 0xFFFF # mask value
addiu $sp, $sp, -4 # make room on the stack for $ra
sw $ra, ($sp)
save_registers
jal write_backup # write the value out
sw $6, REG_PC($16) # save the PC (delay slot)
restore_registers
lw $ra, ($sp) # restore return address
jr $ra # we can return
addiu $sp, $sp, 4 # fix the stack
ext_store_u8_jtable:
.long ext_store_ignore # 0x00 BIOS
.long ext_store_ignore # 0x01 invalid
.long ext_store_ignore # 0x02 EWRAM
.long ext_store_ignore # 0x03 IWRAM
.long ext_store_io8 # 0x04 I/O registers
.long ext_store_palette8 # 0x05 Palette RAM
.long ext_store_vram8 # 0x06 VRAM
.long ext_store_oam8 # 0x07 OAM RAM
.long ext_store_ignore # 0x08 gamepak (no RTC accepted in 8bit)
.long ext_store_ignore # 0x09 gamepak, ignore
.long ext_store_ignore # 0x0A gamepak, ignore
.long ext_store_ignore # 0x0B gamepak, ignore
.long ext_store_ignore # 0x0C gamepak, ignore
.long ext_store_eeprom # 0x0D EEPROM (possibly)
.long ext_store_backup # 0x0E Flash ROM/SRAM
.long ext_store_ignore # 0x0F invalid
# 16bit ext memory routines
ext_store_io16:
andi $4, $4, 0x3FF # wrap around address
andi $5, $5, 0xFFFF # make value 16bit
addiu $sp, $sp, -4 # make room on the stack for $ra
sw $ra, ($sp)
save_registers
jal write_io_register16 # write the value out
sw $6, REG_PC($16) # save the PC (delay slot)
j write_io_epilogue # handle any state changes
nop
ext_store_palette16:
andi $4, 0x3FF # wrap address
ext_store_palette16b:
lui $2, %hi(palette_ram)
addu $2, $2, $4
sh $5, %lo(palette_ram)($2) # palette_ram[address] = value
sll $1, $5, 1 # make green 6bits
ins $1, $0, 0, 6 # make bottom bit 0
ins $1, $5, 0, 5 # insert red channel into $1
lui $2, %hi(palette_ram_converted)
addu $2, $2, $4
jr $ra # return
sh $1, %lo(palette_ram_converted)($2)
ext_store_vram16:
ext $4, $4, 0, 17 # address = adress & 0x1FFFF
lui $1, %hi(0x18000) # $1 = 0x18000
sltu $1, $4, $1 # see if address < 0x18000
bne $1, $0, ext_store_vram16b
lui $2, %hi(vram) # start loading vram address (delay)
addiu $4, $4, -0x8000 # move address into VRAM region
ext_store_vram16b:
addu $2, $2, $4 # $2 = (hi)vram + address
jr $ra # return
sh $5, %lo(vram)($2) # vram[address] = value (delay)
ext_store_oam16:
lui $1, %hi(oam_update) # $1 = oam_update
addiu $1, %lo(oam_update)
li $2, 1 # $2 = 1
sw $2, ($1) # *oam_update = 1
andi $4, $4, 0x3FF # wrap around address
lui $1, %hi(oam_ram) # $1 = (hi)oam_ram
addu $1, $1, $4 # $1 = (hi)oam_ram + address
jr $ra # return
sh $5, %lo(oam_ram)($1) # oam_ram[address] = value (delay)
ext_store_rtc:
andi $5, $5, 0xFFFF # make value 16bit
addiu $sp, $sp, -4 # make room on the stack for $ra
sw $ra, ($sp)
save_registers
jal write_rtc # write the value out
sw $6, REG_PC($16) # save the PC (delay slot)
restore_registers
lw $ra, ($sp) # restore return address
jr $ra # we can return
addiu $sp, $sp, 4 # fix the stack
ext_store_u16_jtable:
.long ext_store_ignore # 0x00 BIOS, ignore
.long ext_store_ignore # 0x01 invalid, ignore
.long ext_store_ignore # 0x02 EWRAM, should have been hit already
.long ext_store_ignore # 0x03 IWRAM, should have been hit already
.long ext_store_io16 # 0x04 I/O registers
.long ext_store_palette16 # 0x05 Palette RAM
.long ext_store_vram16 # 0x06 VRAM
.long ext_store_oam16 # 0x07 OAM RAM
.long ext_store_rtc # 0x08 gamepak, RTC
.long ext_store_ignore # 0x09 gamepak, ignore
.long ext_store_ignore # 0x0A gamepak, ignore
.long ext_store_ignore # 0x0B gamepak, ignore
.long ext_store_ignore # 0x0C gamepak, ignore
.long ext_store_eeprom # 0x0D EEPROM (possibly)
.long ext_store_ignore # 0x0E Flash ROM/SRAM
# 32bit ext memory routines
ext_store_io32:
andi $4, $4, 0x3FF # wrap around address
addiu $sp, $sp, -4 # make room on the stack for $ra
sw $ra, ($sp)
save_registers
jal write_io_register32 # write the value out
sw $6, REG_PC($16) # save the PC (delay slot)
j write_io_epilogue # handle any state changes
nop
ext_store_palette32:
addu $6, $ra, $0 # save return address in $6
jal ext_store_palette16b # write out palette entry
andi $4, 0x3FF # wrap address (delay)
addiu $4, $4, 2 # go to next location
srl $5, $5, 16 # shift to next 16bit value
j ext_store_palette16b # write out next palette entry
addu $ra, $6, $0 # restore return address (delay)
ext_store_vram32:
ext $4, $4, 0, 17 # address = adress & 0x1FFFF
lui $1, %hi(0x18000) # $1 = 0x18000
sltu $1, $4, $1 # see if address < 0x18000
bne $1, $0, ext_store_vram32b
lui $2, %hi(vram) # start loading vram address (delay)
addiu $4, $4, -0x8000 # move address into VRAM region
ext_store_vram32b:
addu $2, $2, $4 # $2 = (hi)vram + address
jr $ra # return
sw $5, %lo(vram)($2) # vram[address] = value (delay)
ext_store_oam32:
lui $1, %hi(oam_update) # $1 = oam_update
addiu $1, %lo(oam_update)
li $2, 1 # $2 = 1
sw $2, ($1) # *oam_update = 1
andi $4, $4, 0x3FF # wrap around address
lui $1, %hi(oam_ram) # $1 = (hi)oam_ram
addu $1, $1, $4 # $1 = (hi)oam_ram + address
jr $ra # return
sw $5, %lo(oam_ram)($1) # oam_ram[address] = value (delay)
ext_store_u32_jtable:
.long ext_store_ignore # 0x00 BIOS, ignore
.long ext_store_ignore # 0x01 invalid, ignore
.long ext_store_ignore # 0x02 EWRAM, should have been hit already
.long ext_store_ignore # 0x03 IWRAM, should have been hit already
.long ext_store_io32 # 0x04 I/O registers
.long ext_store_palette32 # 0x05 Palette RAM
.long ext_store_vram32 # 0x06 VRAM
.long ext_store_oam32 # 0x07 OAM RAM
.long ext_store_ignore # 0x08 gamepak, ignore
.long ext_store_ignore # 0x09 gamepak, ignore
.long ext_store_ignore # 0x0A gamepak, ignore
.long ext_store_ignore # 0x0B gamepak, ignore
.long ext_store_ignore # 0x0C gamepak, ignore
.long ext_store_eeprom # 0x0D EEPROM (possibly)
.long ext_store_ignore # 0x0E Flash ROM/SRAM
ext_store_u32:
srl $1, $4, 24 # $1 = address >> 24
sltu $2, $1, 16 # check if the value is out of range
beq $2, $0, ext_store_ignore
sll $1, $1, 2 # make address word indexed (delay)
lui $2, %hi(ext_store_u32_jtable)
addu $2, $2, $1
# $2 = ext_store_u32_jtable[address >> 24]
lw $2, %lo(ext_store_u32_jtable)($2)
jr $2 # jump to table location
nop
# 32bit ext aligned, non a2 destroying routines
ext_store_io32a:
andi $4, $4, 0x3FF # wrap around address
addiu $sp, $sp, -4 # make room on the stack for $ra
sw $ra, ($sp)
save_registers
jal write_io_register32 # write the value out
sw $6, REG_SAVE($16) # save a2
lw $6, REG_SAVE($16) # restore a2
j write_io_epilogue # handle any state changes
nop
ext_store_palette32a:
sw $ra, REG_SAVE($16) # save return address
jal ext_store_palette16b # write out palette entry
andi $4, 0x3FF # wrap address (delay)
addiu $4, $4, 2 # go to next location
srl $5, $5, 16 # shift to next 16bit value
j ext_store_palette16b # write out next palette entry
lw $ra, REG_SAVE($16) # restore return address (delay)
ext_store_u32a_jtable:
.long ext_store_ignore # 0x00 BIOS, ignore
.long ext_store_ignore # 0x01 invalid, ignore
.long ext_store_ignore # 0x02 EWRAM, should have been hit already
.long ext_store_ignore # 0x03 IWRAM, should have been hit already
.long ext_store_io32a # 0x04 I/O registers
.long ext_store_palette32a # 0x05 Palette RAM
.long ext_store_vram32 # 0x06 VRAM
.long ext_store_oam32 # 0x07 OAM RAM
.long ext_store_ignore # 0x08 gamepak, ignore
.long ext_store_ignore # 0x09 gamepak, ignore
.long ext_store_ignore # 0x0A gamepak, ignore
.long ext_store_ignore # 0x0B gamepak, ignore
.long ext_store_ignore # 0x0C gamepak, ignore
.long ext_store_ignore # 0x0D EEPROM (nothing will write this)
.long ext_store_ignore # 0x0E Flash ROM/SRAM
smc_write:
save_registers
jal flush_translation_cache_ram # flush translation cache