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Fix tracing conditional ARM insts

This commit is contained in:
David Guillen Fandos 2023-04-14 01:40:51 +02:00
parent 2bbd77054e
commit 9ef1a4d7b8
1 changed files with 1 additions and 1 deletions
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2
cpu_threaded.c
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@ -288,7 +288,6 @@ void translate_icache_sync() {
check_pc_region(pc); \
opcode = address32(pc_address_block, (pc & 0x7FFF)); \
condition = block_data[block_data_position].condition; \
emit_trace_arm_instruction(pc); \
\
if((condition != last_condition) || (condition >= 0x20)) \
{ \
@ -306,6 +305,7 @@ void translate_icache_sync() {
arm_conditional_block_header(); \
} \
} \
emit_trace_arm_instruction(pc); \
\
switch((opcode >> 20) & 0xFF) \
{ \