Simplify I/O writes further
Improve FIFO writes, make them a bit faster
This commit is contained in:
parent
6bf53cf3db
commit
8c6ff8d358
3 changed files with 22 additions and 98 deletions
69
gba_memory.c
69
gba_memory.c
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@ -1011,16 +1011,6 @@ cpu_alert_type function_cc write_io_register8(u32 address, u32 value)
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address8(io_registers, address) = value;
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break;
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// Sound FIFO A
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case 0xA0:
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sound_timer_queue8(0, value);
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break;
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// Sound FIFO B
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case 0xA4:
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sound_timer_queue8(1, value);
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break;
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// DMA control (trigger byte)
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case 0xBB:
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access_register8_low(0xBA);
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@ -1274,16 +1264,6 @@ cpu_alert_type function_cc write_io_register16(u32 address, u32 value)
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address16(io_registers, address) = eswap16(value);
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break;
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// Sound FIFO A
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case 0xA0:
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sound_timer_queue16(0, value);
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break;
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// Sound FIFO B
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case 0xA4:
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sound_timer_queue16(1, value);
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break;
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// DMA control
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case 0xBA:
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return trigger_dma(0, value);
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@ -1375,55 +1355,24 @@ cpu_alert_type function_cc write_io_register16(u32 address, u32 value)
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return CPU_ALERT_NONE;
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}
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cpu_alert_type function_cc write_io_register32(u32 address, u32 value)
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{
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switch(address)
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{
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// BG2 reference X
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case 0x28:
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affine_reference_x[0] = (s32)(value << 4) >> 4;
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address32(io_registers, 0x28) = eswap32(value);
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break;
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// BG2 reference Y
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case 0x2C:
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affine_reference_y[0] = (s32)(value << 4) >> 4;
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address32(io_registers, 0x2C) = eswap32(value);
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break;
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// BG3 reference X
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case 0x38:
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affine_reference_x[1] = (s32)(value << 4) >> 4;
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address32(io_registers, 0x38) = eswap32(value);
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break;
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// BG3 reference Y
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case 0x3C:
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affine_reference_y[1] = (s32)(value << 4) >> 4;
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address32(io_registers, 0x3C) = eswap32(value);
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break;
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// Sound FIFO A
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case 0xA0:
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// Handle sound FIFO data write
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if (address == 0xA0) {
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sound_timer_queue32(0, value);
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break;
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// Sound FIFO B
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case 0xA4:
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return CPU_ALERT_NONE;
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}
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else if (address == 0xA4) {
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sound_timer_queue32(1, value);
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break;
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return CPU_ALERT_NONE;
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}
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default:
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{
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// Perform two 16 bit writes. Low part goes first apparently.
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// Some Count+Control DMA writes use 32 bit, so control must be last.
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cpu_alert_type allow = write_io_register16(address, value & 0xFFFF);
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cpu_alert_type alhigh = write_io_register16(address + 2, value >> 16);
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return allow | alhigh;
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}
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}
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return CPU_ALERT_NONE;
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}
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#define write_palette8(address, value) \
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{ \
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41
sound.c
41
sound.c
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@ -31,46 +31,23 @@ static u32 sound_buffer_base;
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static fixed16_16 gbc_sound_tick_step;
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/* Queue 1 sample to the top of the DS FIFO, wrap around circularly */
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void sound_timer_queue8(u32 channel, u8 value)
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{
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direct_sound_struct *ds = direct_sound_channel + channel;
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*((s8 *)(ds->fifo + ds->fifo_top)) = value;
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ds->fifo_top = (ds->fifo_top + 1) % 32;
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}
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/* Queue 2 samples to the top of the DS FIFO, wrap around circularly */
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void sound_timer_queue16(u32 channel, u16 value)
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{
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direct_sound_struct *ds = direct_sound_channel + channel;
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*((s8 *)(ds->fifo + ds->fifo_top)) = value & 0xFF;
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ds->fifo_top = (ds->fifo_top + 1) % 32;
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*((s8 *)(ds->fifo + ds->fifo_top)) = value >> 8;
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ds->fifo_top = (ds->fifo_top + 1) % 32;
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}
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/* Queue 4 samples to the top of the DS FIFO, wrap around circularly */
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void sound_timer_queue32(u32 channel, u32 value)
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{
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direct_sound_struct *ds = direct_sound_channel + channel;
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direct_sound_struct *ds = &direct_sound_channel[channel];
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*((s8 *)(ds->fifo + ds->fifo_top)) = value & 0xFF;
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ds->fifo_top = (ds->fifo_top + 1) % 32;
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ds->fifo[ds->fifo_top++] = value & 0xFF;
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ds->fifo_top &= 31;
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*((s8 *)(ds->fifo + ds->fifo_top)) = (value >> 8) & 0xFF;
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ds->fifo_top = (ds->fifo_top + 1) % 32;
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ds->fifo[ds->fifo_top++] = (value >> 8) & 0xFF;
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ds->fifo_top &= 31;
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*((s8 *)(ds->fifo + ds->fifo_top)) = (value >> 16) & 0xFF;
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ds->fifo_top = (ds->fifo_top + 1) % 32;
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ds->fifo[ds->fifo_top++] = (value >> 16) & 0xFF;
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ds->fifo_top &= 31;
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*((s8 *)(ds->fifo + ds->fifo_top)) = (value >> 24);
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ds->fifo_top = (ds->fifo_top + 1) % 32;
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ds->fifo[ds->fifo_top++] = (value >> 24);
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ds->fifo_top &= 31;
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}
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2
sound.h
2
sound.h
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@ -98,8 +98,6 @@ extern u32 gbc_sound_last_cpu_ticks;
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extern const u32 sound_frequency;
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extern u32 sound_on;
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void sound_timer_queue8(u32 channel, u8 value);
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void sound_timer_queue16(u32 channel, u16 value);
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void sound_timer_queue32(u32 channel, u32 value);
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unsigned sound_timer(fixed8_24 frequency_step, u32 channel);
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void sound_reset_fifo(u32 channel);
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