Simplify I/O writes further

Improve FIFO writes, make them a bit faster
This commit is contained in:
David Guillen Fandos 2023-04-20 00:52:01 +02:00
parent 6bf53cf3db
commit 8c6ff8d358
3 changed files with 22 additions and 98 deletions

View File

@ -1011,16 +1011,6 @@ cpu_alert_type function_cc write_io_register8(u32 address, u32 value)
address8(io_registers, address) = value;
break;
// Sound FIFO A
case 0xA0:
sound_timer_queue8(0, value);
break;
// Sound FIFO B
case 0xA4:
sound_timer_queue8(1, value);
break;
// DMA control (trigger byte)
case 0xBB:
access_register8_low(0xBA);
@ -1274,16 +1264,6 @@ cpu_alert_type function_cc write_io_register16(u32 address, u32 value)
address16(io_registers, address) = eswap16(value);
break;
// Sound FIFO A
case 0xA0:
sound_timer_queue16(0, value);
break;
// Sound FIFO B
case 0xA4:
sound_timer_queue16(1, value);
break;
// DMA control
case 0xBA:
return trigger_dma(0, value);
@ -1375,54 +1355,23 @@ cpu_alert_type function_cc write_io_register16(u32 address, u32 value)
return CPU_ALERT_NONE;
}
cpu_alert_type function_cc write_io_register32(u32 address, u32 value)
{
switch(address)
{
// BG2 reference X
case 0x28:
affine_reference_x[0] = (s32)(value << 4) >> 4;
address32(io_registers, 0x28) = eswap32(value);
break;
// BG2 reference Y
case 0x2C:
affine_reference_y[0] = (s32)(value << 4) >> 4;
address32(io_registers, 0x2C) = eswap32(value);
break;
// BG3 reference X
case 0x38:
affine_reference_x[1] = (s32)(value << 4) >> 4;
address32(io_registers, 0x38) = eswap32(value);
break;
// BG3 reference Y
case 0x3C:
affine_reference_y[1] = (s32)(value << 4) >> 4;
address32(io_registers, 0x3C) = eswap32(value);
break;
// Sound FIFO A
case 0xA0:
sound_timer_queue32(0, value);
break;
// Sound FIFO B
case 0xA4:
sound_timer_queue32(1, value);
break;
default:
{
cpu_alert_type allow = write_io_register16(address, value & 0xFFFF);
cpu_alert_type alhigh = write_io_register16(address + 2, value >> 16);
return allow | alhigh;
}
// Handle sound FIFO data write
if (address == 0xA0) {
sound_timer_queue32(0, value);
return CPU_ALERT_NONE;
}
else if (address == 0xA4) {
sound_timer_queue32(1, value);
return CPU_ALERT_NONE;
}
return CPU_ALERT_NONE;
// Perform two 16 bit writes. Low part goes first apparently.
// Some Count+Control DMA writes use 32 bit, so control must be last.
cpu_alert_type allow = write_io_register16(address, value & 0xFFFF);
cpu_alert_type alhigh = write_io_register16(address + 2, value >> 16);
return allow | alhigh;
}
#define write_palette8(address, value) \

41
sound.c
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@ -31,46 +31,23 @@ static u32 sound_buffer_base;
static fixed16_16 gbc_sound_tick_step;
/* Queue 1 sample to the top of the DS FIFO, wrap around circularly */
void sound_timer_queue8(u32 channel, u8 value)
{
direct_sound_struct *ds = direct_sound_channel + channel;
*((s8 *)(ds->fifo + ds->fifo_top)) = value;
ds->fifo_top = (ds->fifo_top + 1) % 32;
}
/* Queue 2 samples to the top of the DS FIFO, wrap around circularly */
void sound_timer_queue16(u32 channel, u16 value)
{
direct_sound_struct *ds = direct_sound_channel + channel;
*((s8 *)(ds->fifo + ds->fifo_top)) = value & 0xFF;
ds->fifo_top = (ds->fifo_top + 1) % 32;
*((s8 *)(ds->fifo + ds->fifo_top)) = value >> 8;
ds->fifo_top = (ds->fifo_top + 1) % 32;
}
/* Queue 4 samples to the top of the DS FIFO, wrap around circularly */
void sound_timer_queue32(u32 channel, u32 value)
{
direct_sound_struct *ds = direct_sound_channel + channel;
direct_sound_struct *ds = &direct_sound_channel[channel];
*((s8 *)(ds->fifo + ds->fifo_top)) = value & 0xFF;
ds->fifo_top = (ds->fifo_top + 1) % 32;
ds->fifo[ds->fifo_top++] = value & 0xFF;
ds->fifo_top &= 31;
*((s8 *)(ds->fifo + ds->fifo_top)) = (value >> 8) & 0xFF;
ds->fifo_top = (ds->fifo_top + 1) % 32;
ds->fifo[ds->fifo_top++] = (value >> 8) & 0xFF;
ds->fifo_top &= 31;
*((s8 *)(ds->fifo + ds->fifo_top)) = (value >> 16) & 0xFF;
ds->fifo_top = (ds->fifo_top + 1) % 32;
ds->fifo[ds->fifo_top++] = (value >> 16) & 0xFF;
ds->fifo_top &= 31;
*((s8 *)(ds->fifo + ds->fifo_top)) = (value >> 24);
ds->fifo_top = (ds->fifo_top + 1) % 32;
ds->fifo[ds->fifo_top++] = (value >> 24);
ds->fifo_top &= 31;
}

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@ -98,8 +98,6 @@ extern u32 gbc_sound_last_cpu_ticks;
extern const u32 sound_frequency;
extern u32 sound_on;
void sound_timer_queue8(u32 channel, u8 value);
void sound_timer_queue16(u32 channel, u16 value);
void sound_timer_queue32(u32 channel, u32 value);
unsigned sound_timer(fixed8_24 frequency_step, u32 channel);
void sound_reset_fifo(u32 channel);