Speed up arm stores
This commit is contained in:
David Guillen Fandos
parent
ac3e75a107
commit
72a4a91fda
181
arm/arm_stub.S
181
arm/arm_stub.S
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@ -51,7 +51,6 @@ _##symbol:
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#define reg_a1 r1
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#define reg_a1 r1
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#define reg_a2 r2
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#define reg_a2 r2
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#define reg_s0 r9
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#define reg_base r11
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#define reg_base r11
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#define reg_flags r9
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#define reg_flags r9
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@ -521,24 +520,78 @@ return_to_main:
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@ Input:
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@ Input:
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@ r0: address
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@ r0: address
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@ r1: value
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@ r1: value
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@ r2: current pc
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@
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@
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@ The instruction at LR is not an inst but a u32 data that contains the PC
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@ The instruction at LR is not an inst but a u32 data that contains the PC
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@ Used for SMC. That's why return is essentially `pc = lr + 4`
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@ Used for SMC. That's why return is essentially `pc = lr + 4`
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#define execute_store_body(store_type, tblnum) ;\
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#define execute_store_builder(store_type, store_op, store_op16, load_op) ;\
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;\
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defsymbl(execute_store_u##store_type) ;\
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usat r2, #4, r0, asr #24 /* r2 contains [0-15] */;\
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ldr pc, [pc, r2, lsl #2] /* load handler addr */;\
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nop ;\
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store_lookup_table(store_type) ;\
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;\
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ext_store_u##store_type: ;\
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save_flags() ;\
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save_flags() ;\
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str lr, [reg_base, #REG_SAVE3] /* save lr */;\
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ldr r2, [lr] /* load PC */;\
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str r2, [reg_base, #REG_PC] /* write out PC */;\
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store_align_##store_type() ;\
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call_c_function(write_memory##store_type) ;\
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b write_epilogue /* handle additional write stuff */;\
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;\
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;\
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mov lr, r0, lsr #24 /* lr = region number */;\
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ext_store_iwram_u##store_type: ;\
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cmp lr, #15 ;\
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save_flags() ;\
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movcs lr, #15 /* lr = min(lr, 15) */;\
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mask_addr_##store_type(15) /* Mask to mirror memory (+align)*/;\
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ldr r2, =(iwram+0x8000) /* r2 = iwram base */;\
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store_op r1, [r0, r2] /* store data */;\
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sub r2, r2, #0x8000 /* r2 = iwram smc base */;\
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load_op r1, [r0, r2] /* r1 = SMC sentinel */;\
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cmp r1, #0 /* Check value, should be zero */;\
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bne 3f /* if so perform smc write */;\
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restore_flags() ;\
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add pc, lr, #4 /* return */;\
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;\
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;\
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add lr, lr, #(16*tblnum + 64) /* lr += table offset */;\
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ext_store_ewram_u##store_type: ;\
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ldr pc, [reg_base, lr, lsl #2] /* jump to handler */;\
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save_flags() ;\
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mask_addr_##store_type(18) /* Mask to mirror memory (+align)*/;\
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ldr r2, =(ewram) /* r2 = ewram base */;\
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store_op r1, [r0, r2] /* store data */;\
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add r2, r2, #0x40000 /* r2 = ewram smc base */;\
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load_op r1, [r0, r2] /* r1 = SMC sentinel */;\
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cmp r1, #0 /* Check value, should be zero */;\
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bne 3f /* if so perform smc write */;\
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restore_flags() ;\
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add pc, lr, #4 /* return */;\
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;\
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ext_store_vram_u##store_type: ;\
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save_flags() ;\
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mask_addr_bus16_##store_type(17) /* Mask to mirror memory (+align)*/;\
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cmp r0, #0x18000 /* Check if exceeds 96KB */;\
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subcs r0, r0, #0x8000 /* Mirror to the last bank */;\
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ldr r2, =(vram) /* r2 = vram base */;\
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restore_flags() ;\
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store_op16 r1, [r0, r2] /* store data */;\
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add pc, lr, #4 /* return */;\
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;\
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ext_store_oam_ram_u##store_type: ;\
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mask_addr_bus16_##store_type(10) /* Mask to mirror memory (+align)*/;\
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sub r2, reg_base, #0x400 /* r2 = oam ram base */;\
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store_op16 r1, [r0, r2] /* store data */;\
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str r2, [reg_base, #OAM_UPDATED] /* write non zero to signal */;\
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add pc, lr, #4 /* return */;\
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;\
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3: ;\
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ldr r0, [lr] /* load PC */;\
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str r0, [reg_base, #REG_PC] /* write out PC */;\
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b smc_write /* perform smc write */;\
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.size execute_store_u##store_type, .-execute_store_u##store_type
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#define store_fnptr_table(store_type) ;\
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@ for ignored areas, just return
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ptr_tbl_##store_type: ;\
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ext_store_ignore:
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add pc, lr, #4 @ return
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#define store_lookup_table(store_type) ;\
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.word ext_store_ignore /* 0x00: BIOS, ignore */;\
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.word ext_store_ignore /* 0x00: BIOS, ignore */;\
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.word ext_store_ignore /* 0x01: ignore */;\
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.word ext_store_ignore /* 0x01: ignore */;\
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.word ext_store_ewram_u##store_type /* 0x02: ewram */;\
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.word ext_store_ewram_u##store_type /* 0x02: ewram */;\
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@ -556,125 +609,56 @@ ptr_tbl_##store_type: ;\
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.word ext_store_u##store_type /* 0x0E: backup */;\
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.word ext_store_u##store_type /* 0x0E: backup */;\
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.word ext_store_ignore /* 0x0F: ignore */;\
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.word ext_store_ignore /* 0x0F: ignore */;\
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@ for ignored areas, just return
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execute_store_builder(8, strb, strh, ldrb)
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ext_store_ignore:
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execute_store_builder(16, strh, strh, ldrh)
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ldr lr, [reg_base, #REG_SAVE3] @ pop lr off of stack
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execute_store_builder(32, str, str, ldr)
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restore_flags()
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add pc, lr, #4 @ return
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#define execute_store_builder(store_type, store_op, store_op16, load_op, tn) ;\
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;\
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defsymbl(execute_store_u##store_type) ;\
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execute_store_body(store_type, tn) ;\
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;\
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ext_store_u##store_type: ;\
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ldr lr, [reg_base, #REG_SAVE3] /* pop lr off of stack */;\
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ldr r2, [lr] /* load PC */;\
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str r2, [reg_base, #REG_PC] /* write out PC */;\
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store_align_##store_type() ;\
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call_c_function(write_memory##store_type) ;\
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b write_epilogue /* handle additional write stuff */;\
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;\
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ext_store_iwram_u##store_type: ;\
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mask_addr_##store_type(15) /* Mask to mirror memory (+align)*/;\
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ldr r2, =(iwram+0x8000) /* r2 = iwram base */;\
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store_op r1, [r0, r2] /* store data */;\
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sub r2, r2, #0x8000 /* r2 = iwram smc base */;\
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load_op r1, [r0, r2] /* r1 = SMC sentinel */;\
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cmp r1, #0 /* see if it's not 0 */;\
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bne 3f /* if so perform smc write */;\
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ldr lr, [reg_base, #REG_SAVE3] /* pop lr off of stack */;\
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restore_flags() ;\
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add pc, lr, #4 /* return */;\
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;\
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ext_store_ewram_u##store_type: ;\
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mask_addr_##store_type(18) /* Mask to mirror memory (+align)*/;\
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ldr r2, =(ewram) /* r2 = ewram base */;\
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store_op r1, [r0, r2] /* store data */;\
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add r2, r2, #0x40000 /* r2 = ewram smc base */;\
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load_op r1, [r0, r2] /* r1 = SMC sentinel */;\
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cmp r1, #0 /* see if it's not 0 */;\
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bne 3f /* if so perform smc write */;\
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ldr lr, [reg_base, #REG_SAVE3] /* pop lr off of stack */;\
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restore_flags() ;\
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add pc, lr, #4 /* return */;\
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;\
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ext_store_vram_u##store_type: ;\
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mask_addr_bus16_##store_type(17) /* Mask to mirror memory (+align)*/;\
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cmp r0, #0x18000 /* Check if exceeds 96KB */;\
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subcs r0, r0, #0x8000 /* Mirror to the last bank */;\
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ldr r2, =(vram) /* r2 = vram base */;\
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store_op16 r1, [r0, r2] /* store data */;\
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ldr lr, [reg_base, #REG_SAVE3] /* pop lr off of stack */;\
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restore_flags() ;\
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add pc, lr, #4 /* return */;\
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;\
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ext_store_oam_ram_u##store_type: ;\
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mask_addr_bus16_##store_type(10) /* Mask to mirror memory (+align)*/;\
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sub r2, reg_base, #0x400 /* r2 = oam ram base */;\
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store_op16 r1, [r0, r2] /* store data */;\
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str r2, [reg_base, #OAM_UPDATED] /* write non zero to signal */;\
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ldr lr, [reg_base, #REG_SAVE3] /* pop lr off of stack */;\
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restore_flags() ;\
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add pc, lr, #4 /* return */;\
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;\
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3: ;\
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ldr lr, [reg_base, #REG_SAVE3] /* restore lr */;\
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ldr r0, [lr] /* load PC */;\
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str r0, [reg_base, #REG_PC] /* write out PC */;\
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b smc_write /* perform smc write */;\
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.size execute_store_u##store_type, .-execute_store_u##store_type
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execute_store_builder(8, strb, strh, ldrb, 0)
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execute_store_builder(16, strh, strh, ldrh, 1)
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execute_store_builder(32, str, str, ldr, 2)
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@ This is a store that is executed in a strm case (so no SMC checks in-between)
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@ This is a store that is executed in a strm case (so no SMC checks in-between)
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defsymbl(execute_store_u32_safe)
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defsymbl(execute_store_u32_safe)
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execute_store_body(32_safe, 3)
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usat r2, #4, r0, asr #24
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restore_flags()
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ldr pc, [pc, r2, lsl #2]
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ldr pc, [reg_base, #REG_SAVE3] @ return
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nop
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store_lookup_table(32_safe)
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ext_store_u32_safe:
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ext_store_u32_safe:
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ldr lr, [reg_base, #REG_SAVE3] @ Restore lr
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str lr, [reg_base, #REG_SAVE3] @ Restore lr
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save_flags()
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call_c_function(write_memory32) @ Perform 32bit store
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call_c_function(write_memory32) @ Perform 32bit store
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restore_flags()
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restore_flags()
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bx lr @ Return
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ldr pc, [reg_base, #REG_SAVE3] @ return
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ext_store_iwram_u32_safe:
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ext_store_iwram_u32_safe:
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mask_addr_8(15) @ Mask to mirror memory (no need to align!)
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mask_addr_8(15) @ Mask to mirror memory (no need to align!)
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ldr r2, =(iwram+0x8000) @ r2 = iwram base
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ldr r2, =(iwram+0x8000) @ r2 = iwram base
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str r1, [r0, r2] @ store data
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str r1, [r0, r2] @ store data
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restore_flags()
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bx lr @ Return
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ldr pc, [reg_base, #REG_SAVE3] @ return
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ext_store_ewram_u32_safe:
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ext_store_ewram_u32_safe:
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mask_addr_8(18) @ Mask to mirror memory (no need to align!)
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mask_addr_8(18) @ Mask to mirror memory (no need to align!)
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ldr r2, =(ewram) @ r2 = ewram base
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ldr r2, =(ewram) @ r2 = ewram base
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str r1, [r0, r2] @ store data
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str r1, [r0, r2] @ store data
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restore_flags()
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bx lr @ Return
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ldr pc, [reg_base, #REG_SAVE3] @ return
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ext_store_vram_u32_safe:
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ext_store_vram_u32_safe:
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mask_addr_8(17) @ Mask to mirror memory (no need to align!)
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mask_addr_8(17) @ Mask to mirror memory (no need to align!)
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save_flags()
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ldr r2, =(vram) @ r2 = vram base
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ldr r2, =(vram) @ r2 = vram base
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cmp r0, #0x18000 @ Check if exceeds 96KB
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cmp r0, #0x18000 @ Check if exceeds 96KB
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subcs r0, r0, #0x8000 @ Mirror to the last bank
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subcs r0, r0, #0x8000 @ Mirror to the last bank
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str r1, [r0, r2] @ store data
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str r1, [r0, r2] @ store data
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restore_flags()
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restore_flags()
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ldr pc, [reg_base, #REG_SAVE3] @ return
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bx lr @ Return
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ext_store_oam_ram_u32_safe:
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ext_store_oam_ram_u32_safe:
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mask_addr_8(10) @ Mask to mirror memory (no need to align!)
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mask_addr_8(10) @ Mask to mirror memory (no need to align!)
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sub r2, reg_base, #0x400 @ r2 = oam ram base
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sub r2, reg_base, #0x400 @ r2 = oam ram base
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str r1, [r0, r2] @ store data
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str r1, [r0, r2] @ store data
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str r2, [reg_base, #OAM_UPDATED] @ store anything non zero here
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str r2, [reg_base, #OAM_UPDATED] @ store anything non zero here
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restore_flags()
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bx lr @ Return
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ldr pc, [reg_base, #REG_SAVE3] @ return
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.size execute_store_u32_safe, .-execute_store_u32_safe
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.size execute_store_u32_safe, .-execute_store_u32_safe
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write_epilogue:
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write_epilogue:
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cmp r0, #0 @ check if the write rose an alert
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cmp r0, #0 @ check if the write rose an alert
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beq 4f @ if not we can exit
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beq 4f @ if not we can exit
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@ -883,11 +867,6 @@ defsymbl(oam_ram)
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.space 0x400
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.space 0x400
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defsymbl(reg)
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defsymbl(reg)
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.space 0x100, 0
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.space 0x100, 0
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@ Store pointer tables down here
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store_fnptr_table(8)
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store_fnptr_table(16)
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store_fnptr_table(32)
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store_fnptr_table(32_safe)
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@ Vita and 3DS (and of course mmap) map their own cache sections through some
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@ Vita and 3DS (and of course mmap) map their own cache sections through some
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@ platform-speficic mechanisms.
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@ platform-speficic mechanisms.
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