Minor code cleanup to make it more readable
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@ -1022,17 +1022,6 @@ typedef enum
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// This is pretty infrequent (returning from interrupt handlers, et al) so
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// This is pretty infrequent (returning from interrupt handlers, et al) so
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// probably not worth optimizing for.
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// probably not worth optimizing for.
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#define check_for_interrupts() \
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if((io_registers[REG_IE] & io_registers[REG_IF]) && \
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io_registers[REG_IME] && ((reg[REG_CPSR] & 0x80) == 0)) \
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{ \
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reg_mode[MODE_IRQ][6] = reg[REG_PC] + 4; \
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spsr[MODE_IRQ] = reg[REG_CPSR]; \
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reg[REG_CPSR] = 0xD2; \
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address = 0x00000018; \
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set_cpu_mode(MODE_IRQ); \
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} \
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#define generate_load_reg_pc(ireg, reg_index, pc_offset) \
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#define generate_load_reg_pc(ireg, reg_index, pc_offset) \
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if(reg_index == 15) \
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if(reg_index == 15) \
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{ \
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{ \
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@ -1058,7 +1047,16 @@ u32 function_cc execute_spsr_restore(u32 address)
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reg[REG_CPSR] = spsr[reg[CPU_MODE]];
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reg[REG_CPSR] = spsr[reg[CPU_MODE]];
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extract_flags();
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extract_flags();
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set_cpu_mode(cpu_modes[reg[REG_CPSR] & 0x1F]);
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set_cpu_mode(cpu_modes[reg[REG_CPSR] & 0x1F]);
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check_for_interrupts();
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if((io_registers[REG_IE] & io_registers[REG_IF]) &&
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io_registers[REG_IME] && ((reg[REG_CPSR] & 0x80) == 0))
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{
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reg_mode[MODE_IRQ][6] = reg[REG_PC] + 4;
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spsr[MODE_IRQ] = reg[REG_CPSR];
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reg[REG_CPSR] = 0xD2;
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address = 0x00000018;
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set_cpu_mode(MODE_IRQ);
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}
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if(reg[REG_CPSR] & 0x20)
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if(reg[REG_CPSR] & 0x20)
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address |= 0x01;
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address |= 0x01;
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