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Get rid of enums (to u32) for better compat 

Serialization code needs u32 to ensure compatiblity. In platforms with
short enums this goes very wrong. Fixes issues on 3DS platform.
This commit is contained in:
David Guillen Fandos 2021-10-15 21:28:40 +02:00
parent bd5cf7c1e5
commit 6a59c71d55
8 changed files with 151 additions and 265 deletions
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11
cpu.h
View File

@ -35,6 +35,10 @@ typedef u32 cpu_mode_type;
#define MODE_UNDEFINED 0x5 #define MODE_UNDEFINED 0x5
#define MODE_INVALID 0x6 #define MODE_INVALID 0x6
#define CPU_ACTIVE 0
#define CPU_HALT 1
#define CPU_STOP 2
typedef enum typedef enum
{ {
CPU_ALERT_NONE = 0, CPU_ALERT_NONE = 0,
@ -43,13 +47,6 @@ typedef enum
CPU_ALERT_IRQ = 3 CPU_ALERT_IRQ = 3
} cpu_alert_type; } cpu_alert_type;
typedef enum
{
CPU_ACTIVE,
CPU_HALT,
CPU_STOP
} cpu_halt_type;
typedef u16 irq_type; typedef u16 irq_type;
#define IRQ_NONE 0x0000 #define IRQ_NONE 0x0000

132
gba_memory.c
View File

@ -153,7 +153,7 @@ static void gbc_trigger_sound(u32 value)
{ {
gbc_sound_master_volume_right = value & 0x07; gbc_sound_master_volume_right = value & 0x07;
gbc_sound_master_volume_left = (value >> 4) & 0x07; gbc_sound_master_volume_left = (value >> 4) & 0x07;
gbc_sound_channel[channel].status = (gbc_sound_status_type) gbc_sound_channel[channel].status =
(((value >> (channel + 8)) & 0x1) | ((value >> (channel + 11)) & 0x3)); (((value >> (channel + 8)) & 0x1) | ((value >> (channel + 11)) & 0x3));
} }
write_ioreg(REG_SOUNDCNT_L, value); write_ioreg(REG_SOUNDCNT_L, value);
@ -161,18 +161,14 @@ static void gbc_trigger_sound(u32 value)
#define trigger_sound() \ #define trigger_sound() \
{ \ { \
timer[0].direct_sound_channels = (timer_ds_channel_type) \ timer[0].direct_sound_channels = \
((((value >> 10) & 0x01) == 0) | ((((value >> 14) & 0x01) == 0) << 1)); \ ((((value >> 10) & 0x01) == 0) | ((((value >> 14) & 0x01) == 0) << 1)); \
timer[1].direct_sound_channels = (timer_ds_channel_type) \ timer[1].direct_sound_channels = \
((((value >> 10) & 0x01) == 1) | ((((value >> 14) & 0x01) == 1) << 1)); \ ((((value >> 10) & 0x01) == 1) | ((((value >> 14) & 0x01) == 1) << 1)); \
direct_sound_channel[0].volume = (direct_sound_volume_type) \ direct_sound_channel[0].volume_halve = ((~(value >> 2)) & 0x01); \
((value >> 2) & 0x01); \ direct_sound_channel[0].status = ((value >> 8) & 0x03); \
direct_sound_channel[0].status = (direct_sound_status_type) \ direct_sound_channel[1].volume_halve = ((~(value >> 3)) & 0x01); \
((value >> 8) & 0x03); \ direct_sound_channel[1].status = ((value >> 12) & 0x03); \
direct_sound_channel[1].volume = (direct_sound_volume_type) \
((value >> 3) & 0x01); \
direct_sound_channel[1].status = (direct_sound_status_type) \
((value >> 12) & 0x03); \
gbc_sound_master_volume = value & 0x03; \ gbc_sound_master_volume = value & 0x03; \
\ \
if((value >> 11) & 0x01) \ if((value >> 11) & 0x01) \
@ -240,7 +236,7 @@ static void trigger_timer(u32 timer_number, u32 value)
timer[timer_number].status = TIMER_PRESCALE; timer[timer_number].status = TIMER_PRESCALE;
timer[timer_number].prescale = prescale; timer[timer_number].prescale = prescale;
timer[timer_number].irq = (timer_irq_type)((value >> 6) & 0x1); timer[timer_number].irq = ((value >> 6) & 0x1);
write_ioreg(REG_TM0D + (timer_number * 2), (u32)(-timer_reload)); write_ioreg(REG_TM0D + (timer_number * 2), (u32)(-timer_reload));
@ -356,17 +352,15 @@ u32 gbc_sound_wave_update = 0;
// Keep it 32KB until the upper 64KB is accessed, then make it 64KB. // Keep it 32KB until the upper 64KB is accessed, then make it 64KB.
backup_type_type backup_type = BACKUP_NONE; u32 backup_type = BACKUP_NONE;
sram_size_type sram_size = SRAM_SIZE_32KB; u32 sram_bankcount = SRAM_SIZE_32KB;
flash_mode_type flash_mode = FLASH_BASE_MODE; u32 flash_mode = FLASH_BASE_MODE;
u32 flash_command_position = 0; u32 flash_command_position = 0;
u32 flash_bank_num; // 0 or 1 u32 flash_bank_num; // 0 or 1
u32 flash_bank_cnt;
flash_device_id_type flash_device_id = FLASH_DEVICE_MACRONIX_64KB; u32 flash_device_id = FLASH_DEVICE_MACRONIX_64KB;
flash_manufacturer_id_type flash_manufacturer_id =
FLASH_MANUFACTURER_MACRONIX;
flash_size_type flash_size = FLASH_SIZE_64KB;
u8 read_backup(u32 address) u8 read_backup(u32 address)
{ {
@ -379,7 +373,7 @@ u8 read_backup(u32 address)
value = gamepak_backup[address]; value = gamepak_backup[address];
else if(flash_mode == FLASH_ID_MODE) else if(flash_mode == FLASH_ID_MODE)
{ {
if (flash_size == FLASH_SIZE_128KB) if (flash_bank_cnt == FLASH_SIZE_128KB)
{ {
/* ID manufacturer type */ /* ID manufacturer type */
if(address == 0x0000) if(address == 0x0000)
@ -420,8 +414,8 @@ u8 read_backup(u32 address)
// EEPROM is 512 bytes by default; it is autodetecte as 8KB if // EEPROM is 512 bytes by default; it is autodetecte as 8KB if
// 14bit address DMAs are made (this is done in the DMA handler). // 14bit address DMAs are made (this is done in the DMA handler).
eeprom_size_type eeprom_size = EEPROM_512_BYTE; u32 eeprom_size = EEPROM_512_BYTE;
eeprom_mode_type eeprom_mode = EEPROM_BASE_MODE; u32 eeprom_mode = EEPROM_BASE_MODE;
u32 eeprom_address = 0; u32 eeprom_address = 0;
u32 eeprom_counter = 0; u32 eeprom_counter = 0;
@ -654,7 +648,7 @@ static cpu_alert_type trigger_dma(u32 dma_number, u32 value)
{ {
if(dma[dma_number].start_type == DMA_INACTIVE) if(dma[dma_number].start_type == DMA_INACTIVE)
{ {
dma_start_type start_type = (dma_start_type)((value >> 12) & 0x03); u32 start_type = ((value >> 12) & 0x03);
u32 src_address = 0xFFFFFFF & (read_dmareg(REG_DMA0SAD, dma_number) | u32 src_address = 0xFFFFFFF & (read_dmareg(REG_DMA0SAD, dma_number) |
(read_dmareg(REG_DMA0SAD + 1, dma_number) << 16)); (read_dmareg(REG_DMA0SAD + 1, dma_number) << 16));
u32 dst_address = 0xFFFFFFF & (read_dmareg(REG_DMA0DAD, dma_number) | u32 dst_address = 0xFFFFFFF & (read_dmareg(REG_DMA0DAD, dma_number) |
@ -662,10 +656,10 @@ static cpu_alert_type trigger_dma(u32 dma_number, u32 value)
dma[dma_number].source_address = src_address; dma[dma_number].source_address = src_address;
dma[dma_number].dest_address = dst_address; dma[dma_number].dest_address = dst_address;
dma[dma_number].source_direction = (dma_increment_type)((value >> 7) & 3); dma[dma_number].source_direction = ((value >> 7) & 3);
dma[dma_number].repeat_type = (dma_repeat_type)((value >> 9) & 0x01); dma[dma_number].repeat_type = ((value >> 9) & 0x01);
dma[dma_number].start_type = start_type; dma[dma_number].start_type = start_type;
dma[dma_number].irq = (dma_irq_type)((value >> 14) & 0x1); dma[dma_number].irq = ((value >> 14) & 0x1);
/* If it is sound FIFO DMA make sure the settings are a certain way */ /* If it is sound FIFO DMA make sure the settings are a certain way */
if((dma_number >= 1) && (dma_number <= 2) && if((dma_number >= 1) && (dma_number <= 2) &&
@ -699,8 +693,8 @@ static cpu_alert_type trigger_dma(u32 dma_number, u32 value)
} }
dma[dma_number].length = length; dma[dma_number].length = length;
dma[dma_number].length_type = (dma_length_type)((value >> 10) & 0x01); dma[dma_number].length_type = ((value >> 10) & 0x01);
dma[dma_number].dest_direction = (dma_increment_type)((value >> 5) & 3); dma[dma_number].dest_direction = ((value >> 5) & 3);
} }
write_dmareg(REG_DMA0CNT_H, dma_number, value); write_dmareg(REG_DMA0CNT_H, dma_number, value);
@ -1508,7 +1502,7 @@ void function_cc write_backup(u32 address, u32 value)
case 0xB0: case 0xB0:
// Bank switch // Bank switch
// Here the chip is now officially 128KB. // Here the chip is now officially 128KB.
flash_size = FLASH_SIZE_128KB; flash_bank_cnt = FLASH_SIZE_128KB;
if(flash_mode == FLASH_BASE_MODE) if(flash_mode == FLASH_BASE_MODE)
flash_mode = FLASH_BANKSWITCH_MODE; flash_mode = FLASH_BANKSWITCH_MODE;
break; break;
@ -1517,10 +1511,7 @@ void function_cc write_backup(u32 address, u32 value)
// Erase chip // Erase chip
if(flash_mode == FLASH_ERASE_MODE) if(flash_mode == FLASH_ERASE_MODE)
{ {
if(flash_size == FLASH_SIZE_64KB) memset(gamepak_backup, 0xFF, 1024 * 64 * flash_bank_cnt);
memset(gamepak_backup, 0xFF, 1024 * 64);
else
memset(gamepak_backup, 0xFF, 1024 * 128);
flash_mode = FLASH_BASE_MODE; flash_mode = FLASH_BASE_MODE;
} }
break; break;
@ -1553,7 +1544,7 @@ void function_cc write_backup(u32 address, u32 value)
if((flash_command_position == 0) && if((flash_command_position == 0) &&
(flash_mode == FLASH_BANKSWITCH_MODE) && (address == 0x0000) && (flash_mode == FLASH_BANKSWITCH_MODE) && (address == 0x0000) &&
(flash_size == FLASH_SIZE_128KB)) (flash_bank_cnt == FLASH_SIZE_128KB))
{ {
flash_bank_num = value & 1; flash_bank_num = value & 1;
flash_mode = FLASH_BASE_MODE; flash_mode = FLASH_BASE_MODE;
@ -1574,7 +1565,7 @@ void function_cc write_backup(u32 address, u32 value)
// Write value to SRAM // Write value to SRAM
// Hit 64KB territory? // Hit 64KB territory?
if(address >= 0x8000) if(address >= 0x8000)
sram_size = SRAM_SIZE_64KB; sram_bankcount = SRAM_SIZE_64KB;
gamepak_backup[address] = value; gamepak_backup[address] = value;
} }
} }
@ -1600,14 +1591,11 @@ void function_cc write_backup(u32 address, u32 value)
// RTC code derived from VBA's (due to lack of any real publically available // RTC code derived from VBA's (due to lack of any real publically available
// documentation...) // documentation...)
typedef enum #define RTC_DISABLED 0
{ #define RTC_IDLE 1
RTC_DISABLED, #define RTC_COMMAND 2
RTC_IDLE, #define RTC_OUTPUT_DATA 3
RTC_COMMAND, #define RTC_INPUT_DATA 4
RTC_OUTPUT_DATA,
RTC_INPUT_DATA
} rtc_state_type;
typedef enum typedef enum
{ {
@ -1618,15 +1606,12 @@ typedef enum
RTC_COMMAND_OUTPUT_TIME = 0x67 RTC_COMMAND_OUTPUT_TIME = 0x67
} rtc_command_type; } rtc_command_type;
typedef enum #define RTC_WRITE_TIME 0
{ #define RTC_WRITE_TIME_FULL 1
RTC_WRITE_TIME, #define RTC_WRITE_STATUS 2
RTC_WRITE_TIME_FULL,
RTC_WRITE_STATUS
} rtc_write_mode_type;
rtc_state_type rtc_state = RTC_DISABLED; u32 rtc_state = RTC_DISABLED;
rtc_write_mode_type rtc_write_mode; u32 rtc_write_mode;
u8 rtc_registers[3]; u8 rtc_registers[3];
u32 rtc_command; u32 rtc_command;
u32 rtc_data[12]; u32 rtc_data[12];
@ -2025,18 +2010,18 @@ u32 load_backup(char *name)
case 0x8000: case 0x8000:
backup_type = BACKUP_SRAM; backup_type = BACKUP_SRAM;
sram_size = SRAM_SIZE_32KB; sram_bankcount = SRAM_SIZE_32KB;
break; break;
// Could be either flash or SRAM, go with flash // Could be either flash or SRAM, go with flash
case 0x10000: case 0x10000:
backup_type = BACKUP_FLASH; backup_type = BACKUP_FLASH;
sram_size = (sram_size_type)FLASH_SIZE_64KB; sram_bankcount = SRAM_SIZE_64KB;
break; break;
case 0x20000: case 0x20000:
backup_type = BACKUP_FLASH; backup_type = BACKUP_FLASH;
flash_size = FLASH_SIZE_128KB; flash_bank_cnt = FLASH_SIZE_128KB;
break; break;
} }
return 1; return 1;
@ -2064,24 +2049,15 @@ u32 save_backup(char *name)
switch(backup_type) switch(backup_type)
{ {
case BACKUP_SRAM: case BACKUP_SRAM:
if(sram_size == SRAM_SIZE_32KB) backup_size = 0x8000 * sram_bankcount;
backup_size = 0x8000;
else
backup_size = 0x10000;
break; break;
case BACKUP_FLASH: case BACKUP_FLASH:
if(flash_size == FLASH_SIZE_64KB) backup_size = 0x10000 * flash_bank_cnt;
backup_size = 0x10000;
else
backup_size = 0x20000;
break; break;
case BACKUP_EEPROM: case BACKUP_EEPROM:
if(eeprom_size == EEPROM_512_BYTE) backup_size = 0x200 * eeprom_size;
backup_size = 0x200;
else
backup_size = 0x2000;
break; break;
default: default:
@ -2153,7 +2129,7 @@ typedef struct
char gamepak_code[5]; char gamepak_code[5];
char gamepak_maker[3]; char gamepak_maker[3];
int flash_size; int flash_size;
flash_device_id_type flash_device_id; u32 flash_device_id;
int save_type; int save_type;
int rtc_enabled; int rtc_enabled;
int mirroring_enabled; int mirroring_enabled;
@ -2201,7 +2177,7 @@ static s32 load_game_config_over(gamepak_info_t *gpinfo)
flash_device_id = gbaover[i].flash_device_id; flash_device_id = gbaover[i].flash_device_id;
if (flash_device_id == FLASH_DEVICE_MACRONIX_128KB) if (flash_device_id == FLASH_DEVICE_MACRONIX_128KB)
flash_size = FLASH_SIZE_128KB; flash_bank_cnt = FLASH_SIZE_128KB;
if (gbaover[i].translation_gate_target_1 != 0) if (gbaover[i].translation_gate_target_1 != 0)
{ {
@ -2820,13 +2796,9 @@ static cpu_alert_type dma_transfer_copy(
bool dst_wb = dmach->dest_direction < 3; bool dst_wb = dmach->dest_direction < 3;
if(dmach->length_type == DMA_16BIT) if(dmach->length_type == DMA_16BIT)
{
return dma_tf_loop16(src_ptr, dest_ptr, 2 * src_stride, 2 * dst_stride, dst_wb, length, dmach); return dma_tf_loop16(src_ptr, dest_ptr, 2 * src_stride, 2 * dst_stride, dst_wb, length, dmach);
}
else else
{
return dma_tf_loop32(src_ptr, dest_ptr, 4 * src_stride, 4 * dst_stride, dst_wb, length, dmach); return dma_tf_loop32(src_ptr, dest_ptr, 4 * src_stride, 4 * dst_stride, dst_wb, length, dmach);
}
} }
return CPU_ALERT_NONE; return CPU_ALERT_NONE;
@ -3046,7 +3018,7 @@ void init_memory(void)
backup_type = BACKUP_NONE; backup_type = BACKUP_NONE;
sram_size = SRAM_SIZE_32KB; sram_bankcount = SRAM_SIZE_32KB;
//flash_size = FLASH_SIZE_64KB; //flash_size = FLASH_SIZE_64KB;
flash_bank_num = 0; flash_bank_num = 0;
@ -3095,14 +3067,13 @@ bool memory_read_savestate(const u8 *src)
bson_read_bytes(memdoc, "ioregs", io_registers, sizeof(io_registers)) && bson_read_bytes(memdoc, "ioregs", io_registers, sizeof(io_registers)) &&
bson_read_int32(bakdoc, "backup-type", &backup_type) && bson_read_int32(bakdoc, "backup-type", &backup_type) &&
bson_read_int32(bakdoc, "sram-size", &sram_size) && bson_read_int32(bakdoc, "sram-size", &sram_bankcount) &&
bson_read_int32(bakdoc, "flash-mode", &flash_mode) && bson_read_int32(bakdoc, "flash-mode", &flash_mode) &&
bson_read_int32(bakdoc, "flash-cmd-pos", &flash_command_position) && bson_read_int32(bakdoc, "flash-cmd-pos", &flash_command_position) &&
bson_read_int32(bakdoc, "flash-bank-num", &flash_bank_num) && bson_read_int32(bakdoc, "flash-bank-num", &flash_bank_num) &&
bson_read_int32(bakdoc, "flash-dev-id", &flash_device_id) && bson_read_int32(bakdoc, "flash-dev-id", &flash_device_id) &&
bson_read_int32(bakdoc, "flash-man-id", &flash_manufacturer_id) && bson_read_int32(bakdoc, "flash-size", &flash_bank_cnt) &&
bson_read_int32(bakdoc, "flash-size", &flash_size) &&
bson_read_int32(bakdoc, "eeprom-size", &eeprom_size) && bson_read_int32(bakdoc, "eeprom-size", &eeprom_size) &&
bson_read_int32(bakdoc, "eeprom-mode", &eeprom_mode) && bson_read_int32(bakdoc, "eeprom-mode", &eeprom_mode) &&
@ -3155,15 +3126,14 @@ unsigned memory_write_savestate(u8 *dst)
bson_finish_document(dst, wbptr); bson_finish_document(dst, wbptr);
bson_start_document(dst, "backup", wbptr); bson_start_document(dst, "backup", wbptr);
bson_write_int32(dst, "backup-type", backup_type); bson_write_int32(dst, "backup-type", (u32)backup_type);
bson_write_int32(dst, "sram-size", sram_size); bson_write_int32(dst, "sram-size", sram_bankcount);
bson_write_int32(dst, "flash-mode", flash_mode); bson_write_int32(dst, "flash-mode", flash_mode);
bson_write_int32(dst, "flash-cmd-pos", flash_command_position); bson_write_int32(dst, "flash-cmd-pos", flash_command_position);
bson_write_int32(dst, "flash-bank-num", flash_bank_num); bson_write_int32(dst, "flash-bank-num", flash_bank_num);
bson_write_int32(dst, "flash-dev-id", flash_device_id); bson_write_int32(dst, "flash-dev-id", flash_device_id);
bson_write_int32(dst, "flash-man-id", flash_manufacturer_id); bson_write_int32(dst, "flash-size", flash_bank_cnt);
bson_write_int32(dst, "flash-size", flash_size);
bson_write_int32(dst, "eeprom-size", eeprom_size); bson_write_int32(dst, "eeprom-size", eeprom_size);
bson_write_int32(dst, "eeprom-mode", eeprom_mode); bson_write_int32(dst, "eeprom-mode", eeprom_mode);
@ -3281,7 +3251,7 @@ u32 load_gamepak(const struct retro_game_info* info, const char *name)
iwram_stack_optimize = 1; iwram_stack_optimize = 1;
translation_gate_targets = 0; translation_gate_targets = 0;
flash_device_id = FLASH_DEVICE_MACRONIX_64KB; flash_device_id = FLASH_DEVICE_MACRONIX_64KB;
flash_size = FLASH_SIZE_64KB; flash_bank_cnt = FLASH_SIZE_64KB;
if ((load_game_config_over(&gpinfo)) < 0) if ((load_game_config_over(&gpinfo)) < 0)
load_game_config(&gpinfo); load_game_config(&gpinfo);

171
gba_memory.h
View File

@ -25,60 +25,42 @@ extern int use_libretro_save_method;
#define DMA_CHAN_CNT 4 #define DMA_CHAN_CNT 4
typedef enum #define DMA_START_IMMEDIATELY 0
{ #define DMA_START_VBLANK 1
DMA_START_IMMEDIATELY = 0, #define DMA_START_HBLANK 2
DMA_START_VBLANK = 1, #define DMA_START_SPECIAL 3
DMA_START_HBLANK = 2, #define DMA_INACTIVE 4
DMA_START_SPECIAL = 3,
DMA_INACTIVE = 4
} dma_start_type;
typedef enum #define DMA_16BIT 0
{ #define DMA_32BIT 1
DMA_16BIT = 0,
DMA_32BIT = 1
} dma_length_type;
typedef enum #define DMA_NO_REPEAT 0
{ #define DMA_REPEAT 1
DMA_NO_REPEAT = 0,
DMA_REPEAT = 1
} dma_repeat_type;
typedef enum #define DMA_INCREMENT 0
{ #define DMA_DECREMENT 1
DMA_INCREMENT = 0, #define DMA_FIXED 2
DMA_DECREMENT = 1, #define DMA_RELOAD 3
DMA_FIXED = 2,
DMA_RELOAD = 3
} dma_increment_type;
typedef enum #define DMA_NO_IRQ 0
{ #define DMA_TRIGGER_IRQ 1
DMA_NO_IRQ = 0,
DMA_TRIGGER_IRQ = 1
} dma_irq_type;
typedef enum #define DMA_DIRECT_SOUND_A 0
{ #define DMA_DIRECT_SOUND_B 1
DMA_DIRECT_SOUND_A, #define DMA_NO_DIRECT_SOUND 2
DMA_DIRECT_SOUND_B,
DMA_NO_DIRECT_SOUND
} dma_ds_type;
typedef struct typedef struct
{ {
u32 source_address; u32 source_address;
u32 dest_address; u32 dest_address;
u32 length; u32 length;
dma_repeat_type repeat_type; u32 repeat_type;
dma_ds_type direct_sound_channel; u32 direct_sound_channel;
dma_increment_type source_direction; u32 source_direction;
dma_increment_type dest_direction; u32 dest_direction;
dma_length_type length_type; u32 length_type;
dma_start_type start_type; u32 start_type;
dma_irq_type irq; u32 irq;
} dma_transfer_type; } dma_transfer_type;
typedef enum typedef enum
@ -172,23 +154,18 @@ typedef enum
REG_HALTCNT = 0x180 REG_HALTCNT = 0x180
} hardware_register; } hardware_register;
typedef enum #define FLASH_DEVICE_UNDEFINED 0x00
{ #define FLASH_DEVICE_MACRONIX_64KB 0x1C
FLASH_DEVICE_UNDEFINED = 0x00, #define FLASH_DEVICE_AMTEL_64KB 0x3D
FLASH_DEVICE_MACRONIX_64KB = 0x1C, #define FLASH_DEVICE_SST_64K 0xD4
FLASH_DEVICE_AMTEL_64KB = 0x3D, #define FLASH_DEVICE_PANASONIC_64KB 0x1B
FLASH_DEVICE_SST_64K = 0xD4, #define FLASH_DEVICE_MACRONIX_128KB 0x09
FLASH_DEVICE_PANASONIC_64KB = 0x1B,
FLASH_DEVICE_MACRONIX_128KB = 0x09
} flash_device_id_type;
typedef enum
{ #define FLASH_MANUFACTURER_MACRONIX 0xC2
FLASH_MANUFACTURER_MACRONIX = 0xC2, #define FLASH_MANUFACTURER_AMTEL 0x1F
FLASH_MANUFACTURER_AMTEL = 0x1F, #define FLASH_MANUFACTURER_PANASONIC 0x32
FLASH_MANUFACTURER_PANASONIC = 0x32, #define FLASH_MANUFACTURER_SST 0xBF
FLASH_MANUFACTURER_SST = 0xBF
} flash_manufacturer_id_type;
u8 function_cc read_memory8(u32 address); u8 function_cc read_memory8(u32 address);
u32 read_memory8s(u32 address); u32 read_memory8s(u32 address);
@ -246,61 +223,39 @@ extern u8 *memory_map_read[8 * 1024];
extern u32 reg[64]; extern u32 reg[64];
extern flash_device_id_type flash_device_id; #define BACKUP_SRAM 0
#define BACKUP_FLASH 1
#define BACKUP_EEPROM 2
#define BACKUP_NONE 3
typedef enum #define SRAM_SIZE_32KB 1
{ #define SRAM_SIZE_64KB 2
BACKUP_SRAM,
BACKUP_FLASH,
BACKUP_EEPROM,
BACKUP_NONE
} backup_type_type;
typedef enum #define FLASH_SIZE_64KB 1
{ #define FLASH_SIZE_128KB 2
SRAM_SIZE_32KB,
SRAM_SIZE_64KB
} sram_size_type;
typedef enum #define EEPROM_512_BYTE 1
{ #define EEPROM_8_KBYTE 16
FLASH_BASE_MODE,
FLASH_ERASE_MODE,
FLASH_ID_MODE,
FLASH_WRITE_MODE,
FLASH_BANKSWITCH_MODE
} flash_mode_type;
typedef enum #define EEPROM_BASE_MODE 0
{ #define EEPROM_READ_MODE 1
FLASH_SIZE_64KB, #define EEPROM_READ_HEADER_MODE 2
FLASH_SIZE_128KB #define EEPROM_ADDRESS_MODE 3
} flash_size_type; #define EEPROM_WRITE_MODE 4
#define EEPROM_WRITE_ADDRESS_MODE 5
#define EEPROM_ADDRESS_FOOTER_MODE 6
#define EEPROM_WRITE_FOOTER_MODE 7
#define FLASH_BASE_MODE 0
#define FLASH_ERASE_MODE 1
#define FLASH_ID_MODE 2
#define FLASH_WRITE_MODE 3
#define FLASH_BANKSWITCH_MODE 4
extern backup_type_type backup_type; extern u32 backup_type;
extern sram_size_type sram_size; extern u32 sram_bankcount;
extern flash_size_type flash_size; extern u32 flash_bank_cnt;
extern u32 eeprom_size;
typedef enum
{
EEPROM_512_BYTE,
EEPROM_8_KBYTE
} eeprom_size_type;
typedef enum
{
EEPROM_BASE_MODE,
EEPROM_READ_MODE,
EEPROM_READ_HEADER_MODE,
EEPROM_ADDRESS_MODE,
EEPROM_WRITE_MODE,
EEPROM_WRITE_ADDRESS_MODE,
EEPROM_ADDRESS_FOOTER_MODE,
EEPROM_WRITE_FOOTER_MODE
} eeprom_mode_type;
extern eeprom_size_type eeprom_size;
extern u8 gamepak_backup[1024 * 128]; extern u8 gamepak_backup[1024 * 128];

19
libretro/libretro.c
View File

@ -1048,25 +1048,14 @@ size_t retro_get_memory_size(unsigned id)
switch(backup_type) switch(backup_type)
{ {
case BACKUP_SRAM: case BACKUP_SRAM:
if(sram_size == SRAM_SIZE_32KB) return sram_bankcount * 0x8000;
return 0x8000;
else
return 0x10000;
break;
case BACKUP_FLASH: case BACKUP_FLASH:
if(flash_size == FLASH_SIZE_64KB) return 0x10000 * flash_bank_cnt;
return 0x10000;
else
return 0x20000;
break;
case BACKUP_EEPROM: case BACKUP_EEPROM:
if(eeprom_size == EEPROM_512_BYTE) return 0x200 * eeprom_size;
return 0x200;
else
return 0x2000;
break;
// assume 128KB save, regardless if rom supports battery saves // assume 128KB save, regardless if rom supports battery saves
// this is needed because gba cannot provide initially the backup save size // this is needed because gba cannot provide initially the backup save size
// until a few cycles has passed (unless provided by a database) // until a few cycles has passed (unless provided by a database)

2
main.c
View File

@ -58,7 +58,7 @@ static void update_timers(irq_type *irq_raised)
continue; continue;
/* irq_raised value range: IRQ_TIMER0, IRQ_TIMER1, IRQ_TIMER2, IRQ_TIMER3 */ /* irq_raised value range: IRQ_TIMER0, IRQ_TIMER1, IRQ_TIMER2, IRQ_TIMER3 */
if(timer[i].irq == TIMER_TRIGGER_IRQ) if(timer[i].irq)
*irq_raised |= (8 << i); *irq_raised |= (8 << i);
if((i != 3) && (timer[i + 1].status == TIMER_CASCADE)) if((i != 3) && (timer[i + 1].status == TIMER_CASCADE))

34
main.h
View File

@ -22,27 +22,17 @@
#include <stdio.h> #include <stdio.h>
typedef enum #define TIMER_INACTIVE 0
{ #define TIMER_PRESCALE 1
TIMER_INACTIVE, #define TIMER_CASCADE 2
TIMER_PRESCALE,
TIMER_CASCADE
} timer_status_type;
typedef enum #define TIMER_NO_IRQ 0
{ #define TIMER_TRIGGER_IRQ 1
TIMER_NO_IRQ = 0,
TIMER_TRIGGER_IRQ = 1
} timer_irq_type;
#define TIMER_DS_CHANNEL_NONE 0
typedef enum #define TIMER_DS_CHANNEL_A 1
{ #define TIMER_DS_CHANNEL_B 2
TIMER_DS_CHANNEL_NONE, #define TIMER_DS_CHANNEL_BOTH 3
TIMER_DS_CHANNEL_A,
TIMER_DS_CHANNEL_B,
TIMER_DS_CHANNEL_BOTH
} timer_ds_channel_type;
typedef struct typedef struct
{ {
@ -50,9 +40,9 @@ typedef struct
u32 reload; u32 reload;
u32 prescale; u32 prescale;
fixed8_24 frequency_step; fixed8_24 frequency_step;
timer_ds_channel_type direct_sound_channels; u32 direct_sound_channels;
timer_irq_type irq; u32 irq;
timer_status_type status; u32 status;
} timer_type; } timer_type;
typedef enum typedef enum

13
sound.c
View File

@ -76,7 +76,7 @@ void sound_timer_queue32(u32 channel, u32 value)
void sound_timer(fixed8_24 frequency_step, u32 channel) void sound_timer(fixed8_24 frequency_step, u32 channel)
{ {
direct_sound_status_type sample_status = DIRECT_SOUND_INACTIVE; u32 sample_status = DIRECT_SOUND_INACTIVE;
direct_sound_struct *ds = &direct_sound_channel[channel]; direct_sound_struct *ds = &direct_sound_channel[channel];
fixed8_24 fifo_fractional = ds->fifo_fractional; fixed8_24 fifo_fractional = ds->fifo_fractional;
@ -89,11 +89,8 @@ void sound_timer(fixed8_24 frequency_step, u32 channel)
if(sound_on == 1) if(sound_on == 1)
{ {
if(ds->volume == DIRECT_SOUND_VOLUME_50) current_sample >>= ds->volume_halve;
{ next_sample >>= ds->volume_halve;
current_sample >>= 1;
next_sample >>= 1;
}
sample_status = ds->status; sample_status = ds->status;
} }
@ -629,7 +626,7 @@ bool sound_read_savestate(const u8 *src)
const u8 *sndchan = bson_find_key(snddoc, tn); const u8 *sndchan = bson_find_key(snddoc, tn);
if (!( if (!(
bson_read_int32(sndchan, "status", &ds->status) && bson_read_int32(sndchan, "status", &ds->status) &&
bson_read_int32(sndchan, "volume", &ds->volume) && bson_read_int32(sndchan, "volume", &ds->volume_halve) &&
bson_read_int32(sndchan, "fifo-base", &ds->fifo_base) && bson_read_int32(sndchan, "fifo-base", &ds->fifo_base) &&
bson_read_int32(sndchan, "fifo-top", &ds->fifo_top) && bson_read_int32(sndchan, "fifo-top", &ds->fifo_top) &&
bson_read_int32(sndchan, "fifo-frac", &ds->fifo_fractional) && bson_read_int32(sndchan, "fifo-frac", &ds->fifo_fractional) &&
@ -700,7 +697,7 @@ unsigned sound_write_savestate(u8 *dst)
char tn[4] = {'d', 's', '0' + i, 0}; char tn[4] = {'d', 's', '0' + i, 0};
bson_start_document(dst, tn, wbptr2); bson_start_document(dst, tn, wbptr2);
bson_write_int32(dst, "status", direct_sound_channel[i].status); bson_write_int32(dst, "status", direct_sound_channel[i].status);
bson_write_int32(dst, "volume", direct_sound_channel[i].volume); bson_write_int32(dst, "volume", direct_sound_channel[i].volume_halve);
bson_write_int32(dst, "fifo-base", direct_sound_channel[i].fifo_base); bson_write_int32(dst, "fifo-base", direct_sound_channel[i].fifo_base);
bson_write_int32(dst, "fifo-top", direct_sound_channel[i].fifo_top); bson_write_int32(dst, "fifo-top", direct_sound_channel[i].fifo_top);
bson_write_int32(dst, "fifo-frac", direct_sound_channel[i].fifo_fractional); bson_write_int32(dst, "fifo-frac", direct_sound_channel[i].fifo_fractional);

34
sound.h
View File

@ -27,19 +27,10 @@
#define GBC_BASE_RATE ((float)(16 * 1024 * 1024)) #define GBC_BASE_RATE ((float)(16 * 1024 * 1024))
typedef enum #define DIRECT_SOUND_INACTIVE 0
{ #define DIRECT_SOUND_RIGHT 1
DIRECT_SOUND_INACTIVE = 0, #define DIRECT_SOUND_LEFT 2
DIRECT_SOUND_RIGHT = 1, #define DIRECT_SOUND_LEFTRIGHT 3
DIRECT_SOUND_LEFT = 2,
DIRECT_SOUND_LEFTRIGHT = 3
} direct_sound_status_type;
typedef enum
{
DIRECT_SOUND_VOLUME_50 = 0,
DIRECT_SOUND_VOLUME_100 = 1
} direct_sound_volume_type;
typedef struct typedef struct
{ {
@ -50,17 +41,14 @@ typedef struct
// The + 1 is to give some extra room for linear interpolation // The + 1 is to give some extra room for linear interpolation
// when wrapping around. // when wrapping around.
u32 buffer_index; u32 buffer_index;
direct_sound_status_type status; u32 status;
direct_sound_volume_type volume; u32 volume_halve;
} direct_sound_struct; } direct_sound_struct;
typedef enum #define GBC_SOUND_INACTIVE 0
{ #define GBC_SOUND_RIGHT 1
GBC_SOUND_INACTIVE = 0, #define GBC_SOUND_LEFT 2
GBC_SOUND_RIGHT = 1, #define GBC_SOUND_LEFTRIGHT 3
GBC_SOUND_LEFT = 2,
GBC_SOUND_LEFTRIGHT = 3
} gbc_sound_status_type;
typedef struct typedef struct
@ -88,7 +76,7 @@ typedef struct
u32 wave_type; u32 wave_type;
u32 wave_bank; u32 wave_bank;
u32 wave_volume; u32 wave_volume;
gbc_sound_status_type status; u32 status;
u32 active_flag; u32 active_flag;
u32 master_enable; u32 master_enable;
u32 sample_table_idx; u32 sample_table_idx;