commit
57998622ac
3
Makefile
3
Makefile
|
@ -196,13 +196,14 @@ else ifeq ($(platform), vita)
|
||||||
CC = arm-vita-eabi-gcc$(EXE_EXT)
|
CC = arm-vita-eabi-gcc$(EXE_EXT)
|
||||||
AR = arm-vita-eabi-ar$(EXE_EXT)
|
AR = arm-vita-eabi-ar$(EXE_EXT)
|
||||||
CFLAGS += -DVITA
|
CFLAGS += -DVITA
|
||||||
CFLAGS += -mcpu=cortex-a9 -mfloat-abi=hard
|
CFLAGS += -marm -mcpu=cortex-a9 -mfloat-abi=hard
|
||||||
CFLAGS += -Wall -mword-relocations
|
CFLAGS += -Wall -mword-relocations
|
||||||
CFLAGS += -fomit-frame-pointer -ffast-math
|
CFLAGS += -fomit-frame-pointer -ffast-math
|
||||||
CFLAGS += -mword-relocations -fno-unwind-tables -fno-asynchronous-unwind-tables
|
CFLAGS += -mword-relocations -fno-unwind-tables -fno-asynchronous-unwind-tables
|
||||||
CFLAGS += -ftree-vectorize -fno-optimize-sibling-calls
|
CFLAGS += -ftree-vectorize -fno-optimize-sibling-calls
|
||||||
ASFLAGS += -mcpu=cortex-a9
|
ASFLAGS += -mcpu=cortex-a9
|
||||||
STATIC_LINKING = 1
|
STATIC_LINKING = 1
|
||||||
|
HAVE_DYNAREC = 1
|
||||||
CPU_ARCH := arm
|
CPU_ARCH := arm
|
||||||
|
|
||||||
# CTR(3DS)
|
# CTR(3DS)
|
||||||
|
|
|
@ -21,10 +21,7 @@
|
||||||
#define ARM_EMIT_H
|
#define ARM_EMIT_H
|
||||||
|
|
||||||
#include "arm_codegen.h"
|
#include "arm_codegen.h"
|
||||||
#if defined(VITA)
|
|
||||||
#define VITA_RW_INIT sceKernelOpenVMDomain
|
|
||||||
#define VITA_RW_END sceKernelCloseVMDomain
|
|
||||||
#endif
|
|
||||||
u32 arm_update_gba_arm(u32 pc);
|
u32 arm_update_gba_arm(u32 pc);
|
||||||
u32 arm_update_gba_thumb(u32 pc);
|
u32 arm_update_gba_thumb(u32 pc);
|
||||||
u32 arm_update_gba_idle_arm(u32 pc);
|
u32 arm_update_gba_idle_arm(u32 pc);
|
||||||
|
|
|
@ -260,13 +260,22 @@ static INLINE void RW_END(void)
|
||||||
#if defined(PSP_BUILD)
|
#if defined(PSP_BUILD)
|
||||||
#define translate_invalidate_dcache() sceKernelDcacheWritebackAll()
|
#define translate_invalidate_dcache() sceKernelDcacheWritebackAll()
|
||||||
#elif defined(VITA)
|
#elif defined(VITA)
|
||||||
#define translate_invalidate_dcache() (void)0
|
#define translate_invalidate_dcache_one(which) \
|
||||||
|
if (which##_translation_ptr > last_##which##_translation_ptr) \
|
||||||
#define invalidate_icache_region(addr, size) \
|
|
||||||
{ \
|
{ \
|
||||||
int ret = sceKernelSyncVMDomain(sceBlock, addr, size); \
|
sceKernelSyncVMDomain(sceBlock,last_##which##_translation_ptr, \
|
||||||
|
which##_translation_ptr - last_##which##_translation_ptr); \
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#define translate_invalidate_dcache() \
|
||||||
|
{ \
|
||||||
|
translate_invalidate_dcache_one(rom) \
|
||||||
|
translate_invalidate_dcache_one(ram) \
|
||||||
|
translate_invalidate_dcache_one(bios) \
|
||||||
|
}
|
||||||
|
|
||||||
|
#define invalidate_icache_region(addr, size) (void)0
|
||||||
|
|
||||||
#elif defined(_3DS)
|
#elif defined(_3DS)
|
||||||
#include "3ds/3ds_utils.h"
|
#include "3ds/3ds_utils.h"
|
||||||
|
|
||||||
|
@ -2950,8 +2959,6 @@ u8 *block_lookup_address_##type(u32 pc) \
|
||||||
block_address = (u8 *)(-1); \
|
block_address = (u8 *)(-1); \
|
||||||
break; \
|
break; \
|
||||||
} \
|
} \
|
||||||
if(translation_recursion_level == 0) \
|
|
||||||
RW_END(); \
|
|
||||||
\
|
\
|
||||||
return block_address; \
|
return block_address; \
|
||||||
} \
|
} \
|
||||||
|
@ -3415,7 +3422,6 @@ s32 translate_block_arm(u32 pc, translation_region_type
|
||||||
flush_translation_cache_bios();
|
flush_translation_cache_bios();
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
RW_END();
|
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -3493,13 +3499,11 @@ s32 translate_block_arm(u32 pc, translation_region_type
|
||||||
branch_target = external_block_exits[i].branch_target;
|
branch_target = external_block_exits[i].branch_target;
|
||||||
arm_link_block();
|
arm_link_block();
|
||||||
if(!translation_target){
|
if(!translation_target){
|
||||||
RW_END();
|
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
generate_branch_patch_unconditional(
|
generate_branch_patch_unconditional(
|
||||||
external_block_exits[i].branch_source, translation_target);
|
external_block_exits[i].branch_source, translation_target);
|
||||||
}
|
}
|
||||||
RW_END();
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -3635,7 +3639,6 @@ s32 translate_block_thumb(u32 pc, translation_region_type
|
||||||
flush_translation_cache_bios();
|
flush_translation_cache_bios();
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
RW_END();
|
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -3713,13 +3716,11 @@ s32 translate_block_thumb(u32 pc, translation_region_type
|
||||||
branch_target = external_block_exits[i].branch_target;
|
branch_target = external_block_exits[i].branch_target;
|
||||||
thumb_link_block();
|
thumb_link_block();
|
||||||
if(!translation_target){
|
if(!translation_target){
|
||||||
RW_END();
|
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
generate_branch_patch_unconditional(
|
generate_branch_patch_unconditional(
|
||||||
external_block_exits[i].branch_source, translation_target);
|
external_block_exits[i].branch_source, translation_target);
|
||||||
}
|
}
|
||||||
RW_END();
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
18
libretro.c
18
libretro.c
|
@ -19,6 +19,12 @@ static inline int align(int x, int n) {
|
||||||
#define FOUR_KB_ALIGN(x) align(x, 12)
|
#define FOUR_KB_ALIGN(x) align(x, 12)
|
||||||
#define MB_ALIGN(x) align(x, 20)
|
#define MB_ALIGN(x) align(x, 20)
|
||||||
|
|
||||||
|
int _newlib_vm_size_user = ROM_TRANSLATION_CACHE_SIZE +
|
||||||
|
RAM_TRANSLATION_CACHE_SIZE +
|
||||||
|
BIOS_TRANSLATION_CACHE_SIZE;
|
||||||
|
|
||||||
|
int getVMBlock();
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(_3DS)
|
#if defined(_3DS)
|
||||||
|
@ -163,9 +169,8 @@ void retro_init(void)
|
||||||
if(!translation_caches_inited){
|
if(!translation_caches_inited){
|
||||||
void* currentHandle;
|
void* currentHandle;
|
||||||
|
|
||||||
sceBlock = sceKernelAllocMemBlockForVM("code", MB_ALIGN(FOUR_KB_ALIGN(ROM_TRANSLATION_CACHE_SIZE +
|
sceBlock = getVMBlock();
|
||||||
RAM_TRANSLATION_CACHE_SIZE +
|
|
||||||
BIOS_TRANSLATION_CACHE_SIZE)));
|
|
||||||
if (sceBlock < 0)
|
if (sceBlock < 0)
|
||||||
{
|
{
|
||||||
return;
|
return;
|
||||||
|
@ -237,8 +242,6 @@ void retro_deinit(void)
|
||||||
|
|
||||||
#if defined(VITA) && defined(HAVE_DYNAREC)
|
#if defined(VITA) && defined(HAVE_DYNAREC)
|
||||||
if(translation_caches_inited){
|
if(translation_caches_inited){
|
||||||
sceKernelFreeMemBlock(sceBlock);
|
|
||||||
|
|
||||||
translation_caches_inited = 0;
|
translation_caches_inited = 0;
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
@ -438,6 +441,11 @@ bool retro_load_game(const struct retro_game_info* info)
|
||||||
rom_translation_ptr = rom_translation_cache;
|
rom_translation_ptr = rom_translation_cache;
|
||||||
ram_translation_ptr = ram_translation_cache;
|
ram_translation_ptr = ram_translation_cache;
|
||||||
bios_translation_ptr = bios_translation_cache;
|
bios_translation_ptr = bios_translation_cache;
|
||||||
|
#elif defined(VITA)
|
||||||
|
dynarec_enable = 1;
|
||||||
|
rom_translation_ptr = rom_translation_cache;
|
||||||
|
ram_translation_ptr = ram_translation_cache;
|
||||||
|
bios_translation_ptr = bios_translation_cache;
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
|
|
Loading…
Reference in New Issue