[mips] Improve SP relative accesses
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@ -1372,8 +1372,9 @@ u32 execute_store_cpsr_body(u32 _cpsr, u32 address)
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if((rn == REG_SP) && iwram_stack_optimize) \
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if((rn == REG_SP) && iwram_stack_optimize) \
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{ \
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{ \
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mips_emit_andi(reg_a1, reg_a2, 0x7FFC); \
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mips_emit_andi(reg_a1, reg_a2, 0x7FFC); \
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generate_load_imm(reg_a0, ((u32)(iwram + 0x8000))); \
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mips_emit_lui(reg_a0, ((u32)(iwram + 0x8000 + 0x8000) >> 16)); \
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mips_emit_addu(reg_a1, reg_a1, reg_a0); \
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mips_emit_addu(reg_a1, reg_a1, reg_a0); \
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offset = (u32)(iwram + 0x8000) & 0xFFFF; \
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\
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\
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for(i = 0; i < 16; i++) \
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for(i = 0; i < 16; i++) \
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{ \
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{ \
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@ -1680,11 +1681,11 @@ u32 execute_store_cpsr_body(u32 _cpsr, u32 address)
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#define thumb_block_memory_sp_extra_down() \
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#define thumb_block_memory_sp_extra_down() \
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#define thumb_block_memory_sp_extra_pop_pc() \
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#define thumb_block_memory_sp_extra_pop_pc() \
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mips_emit_lw(reg_a0, reg_a1, (bit_count[reg_list] * 4)); \
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mips_emit_lw(reg_a0, reg_a1, offset); \
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generate_indirect_branch_cycle_update(thumb) \
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generate_indirect_branch_cycle_update(thumb) \
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#define thumb_block_memory_sp_extra_push_lr() \
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#define thumb_block_memory_sp_extra_push_lr() \
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mips_emit_sw(reg_r14, reg_a1, (bit_count[reg_list] * 4)) \
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mips_emit_sw(reg_r14, reg_a1, offset) \
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#define thumb_block_memory(access_type, pre_op, post_op, base_reg) \
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#define thumb_block_memory(access_type, pre_op, post_op, base_reg) \
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{ \
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{ \
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@ -1698,8 +1699,9 @@ u32 execute_store_cpsr_body(u32 _cpsr, u32 address)
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if((base_reg == REG_SP) && iwram_stack_optimize) \
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if((base_reg == REG_SP) && iwram_stack_optimize) \
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{ \
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{ \
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mips_emit_andi(reg_a1, reg_a2, 0x7FFC); \
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mips_emit_andi(reg_a1, reg_a2, 0x7FFC); \
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generate_load_imm(reg_a0, ((u32)(iwram + 0x8000))); \
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mips_emit_lui(reg_a0, ((u32)(iwram + 0x8000 + 0x8000) >> 16)); \
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mips_emit_addu(reg_a1, reg_a1, reg_a0); \
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mips_emit_addu(reg_a1, reg_a1, reg_a0); \
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offset = (u32)(iwram + 0x8000) & 0xFFFF; \
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\
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\
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for(i = 0; i < 8; i++) \
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for(i = 0; i < 8; i++) \
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{ \
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{ \
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