Take out GIZMONDO/POCKETPC ifdefs
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@ -59,48 +59,6 @@ void write_to_file(u32 val);
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//write32(i);
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//write32(i);
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/*{ *(u32*)translation_ptr = (i); translation_ptr += 4; } */
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/*{ *(u32*)translation_ptr = (i); translation_ptr += 4; } */
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#if defined(GIZMONDO) || defined(POCKETPC) /* Implemented but not working right yet for PPC */
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// --------------------------------------------------------------------------
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// These declarations for coredll are extracted from platform builder
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// source code
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// --------------------------------------------------------------------------
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/* Flags for CacheSync/CacheRangeFlush */
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#define CACHE_SYNC_DISCARD 0x001 /* write back & discard all cached data */
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#define CACHE_SYNC_INSTRUCTIONS 0x002 /* discard all cached instructions */
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#define CACHE_SYNC_WRITEBACK 0x004 /* write back but don't discard data cache*/
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#define CACHE_SYNC_FLUSH_I_TLB 0x008 /* flush I-TLB */
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#define CACHE_SYNC_FLUSH_D_TLB 0x010 /* flush D-TLB */
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#define CACHE_SYNC_FLUSH_TLB (CACHE_SYNC_FLUSH_I_TLB|CACHE_SYNC_FLUSH_D_TLB) /* flush all TLB */
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#define CACHE_SYNC_L2_WRITEBACK 0x020 /* write-back L2 Cache */
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#define CACHE_SYNC_L2_DISCARD 0x040 /* discard L2 Cache */
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#define CACHE_SYNC_ALL 0x07F /* sync and discard everything in Cache/TLB */
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extern "C" {
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void CacheSync(int flags);
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}
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#define CLEAR_INSN_CACHE(BEG, END) CacheSync(CACHE_SYNC_INSTRUCTIONS | CACHE_SYNC_WRITEBACK);
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#else
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#if 0
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#define CLEAR_INSN_CACHE(BEG, END) \
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{ \
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register unsigned long _beg __asm ("a1") = (unsigned long) (BEG); \
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register unsigned long _end __asm ("a2") = (unsigned long) (END); \
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register unsigned long _flg __asm ("a3") = 0; \
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register unsigned long _scno __asm ("r7") = 0xf0002; \
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__asm __volatile ("swi 0x9f0002 @ sys_cacheflush" \
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: "=r" (_beg) \
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: "0" (_beg), "r" (_end), "r" (_flg), "r" (_scno)); \
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}
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#endif
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#endif
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#if defined(_MSC_VER) && !defined(ARM_NOIASM)
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#if defined(_MSC_VER) && !defined(ARM_NOIASM)
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# define ARM_IASM(_expr) __easfdmit (_expr)
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# define ARM_IASM(_expr) __easfdmit (_expr)
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#else
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#else
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