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Fix bad ARM code emitter bug 

This mis-emits CMN instead of TEQ and TST in the reg-shift operand mode.
This is never used by gpsp directly but translating real tst opcodes,
hence it only affects games using such instruction.

This fixes video players that previously crashed, many games that had
graphical glitches in ARM mode (but not on other CPUs) usually in menus
or other dialogues. Also fixes games that either crashed or went blank
or similar issues. The extent of fixing is hard to determine but could
affect many games in different levels.
This commit is contained in:
David Guillen Fandos 2021-08-30 02:07:31 +02:00
parent 55c6a69ccd
commit 2295dc4a3a
1 changed files with 2 additions and 2 deletions
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4
arm/arm_dpimacros.h
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@ -1582,13 +1582,13 @@ ARM_CMN_REG_REGSHIFT_COND(p, rn, rm, shift_type, rs, ARMCOND_AL)
#define ARM_TST_REG_REGSHIFT_COND(p, rn, rm, shift_type, rs, cond) \
ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_TST, 0, rn, rm, shift_type, rs, cond)
#define ARM_TST_REG_REGSHIFT(p, rn, rm, shift_type, rs) \
ARM_CMN_REG_REGSHIFT_COND(p, rn, rm, shift_type, rs, ARMCOND_AL)
ARM_TST_REG_REGSHIFT_COND(p, rn, rm, shift_type, rs, ARMCOND_AL)
/* PSR := TEQ Rn, (Rm <shift_type> Rs) */
#define ARM_TEQ_REG_REGSHIFT_COND(p, rn, rm, shift_type, rs, cond) \
ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_TEQ, 0, rn, rm, shift_type, rs, cond)
#define ARM_TEQ_REG_REGSHIFT(p, rn, rm, shift_type, rs) \
ARM_CMN_REG_REGSHIFT_COND(p, rn, rm, shift_type, rs, ARMCOND_AL)
ARM_TEQ_REG_REGSHIFT_COND(p, rn, rm, shift_type, rs, ARMCOND_AL)