Fix a bug with BLH (half BL) on ARM
This fixes issues on games from Camelot (GS2 and Mario Golf)
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1b37289890
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057b80f8cc
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@ -1866,9 +1866,8 @@ u32 execute_store_cpsr_body(u32 _cpsr, u32 store_mask, u32 address)
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generate_update_pc(((pc + 2) | 0x01)); \
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generate_update_pc(((pc + 2) | 0x01)); \
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thumb_generate_load_reg(reg_a1, REG_LR); \
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thumb_generate_load_reg(reg_a1, REG_LR); \
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thumb_generate_store_reg(reg_a0, REG_LR); \
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thumb_generate_store_reg(reg_a0, REG_LR); \
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generate_mov(reg_a0, reg_a1); \
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generate_add_reg_reg_imm(reg_a0, reg_a1, (offset * 2), 0); \
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generate_add_imm(reg_a0, (offset * 2), 0); \
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generate_indirect_branch_cycle_update(dual_thumb); \
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generate_indirect_branch_cycle_update(thumb); \
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} \
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} \
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#define thumb_bx() \
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#define thumb_bx() \
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@ -269,6 +269,7 @@ defsymbl(arm_indirect_branch_dual_arm)
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save_flags()
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save_flags()
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tst r0, #0x01 @ check lower bit
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tst r0, #0x01 @ check lower bit
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bne 1f @ if set going to Thumb mode
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bne 1f @ if set going to Thumb mode
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add r0, #2 @ two LSB are cleared after
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call_c_function(block_lookup_address_arm)
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call_c_function(block_lookup_address_arm)
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restore_flags()
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restore_flags()
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bx r0 @ keep executing arm code
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bx r0 @ keep executing arm code
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@ -296,6 +297,7 @@ defsymbl(arm_indirect_branch_dual_thumb)
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load_registers_arm() @ load in ARM registers
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load_registers_arm() @ load in ARM registers
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bic r1, r1, #0x20 @ clear Thumb mode
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bic r1, r1, #0x20 @ clear Thumb mode
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str r1, [reg_base, #REG_CPSR] @ store flags
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str r1, [reg_base, #REG_CPSR] @ store flags
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add r0, #2 @ two LSB are cleared after
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call_c_function(block_lookup_address_arm)
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call_c_function(block_lookup_address_arm)
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restore_flags()
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restore_flags()
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bx r0
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bx r0
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