diff --git a/cpu.c b/cpu.c
index 8f78818..1d43a5a 100644
--- a/cpu.c
+++ b/cpu.c
@@ -1036,7 +1036,7 @@ const u32 psr_masks[16] =
   fast_read_memory(8, u8, address, dest)                                      \
 
 #define load_memory_u16(address, dest)                                        \
-  fast_read_memory(16, u16, address, dest)                                    \
+  fast_read_memory(16, u32, address, dest)                                    \
 
 #define load_memory_u32(address, dest)                                        \
   fast_read_memory(32, u32, address, dest)                                    \
@@ -1570,6 +1570,7 @@ void raise_interrupt(irq_type irq_raised)
   if((read_ioreg(REG_IE) & irq_raised) && read_ioreg(REG_IME) &&
    ((reg[REG_CPSR] & 0x80) == 0))
   {
+    // Value after the FIQ returns, should be improved
     bios_read_protect = 0xe55ec002;
 
     // Interrupt handler in BIOS
@@ -3189,6 +3190,8 @@ arm_loop:
                 {
                    /* Jump to BIOS SWI handler */
                    default:
+                      // After SWI, we read bios[0xE4]
+                      bios_read_protect = 0xe3a02004;
                       reg_mode[MODE_SUPERVISOR][6] = pc + 4;
                       collapse_flags();
                       spsr[MODE_SUPERVISOR] = reg[REG_CPSR];
@@ -3673,6 +3676,8 @@ thumb_loop:
                 switch(swi_comment)
                 {
                    default:
+                      // After SWI, we read bios[0xE4]
+                      bios_read_protect = 0xe3a02004;
                       reg_mode[MODE_SUPERVISOR][6] = pc + 2;
                       spsr[MODE_SUPERVISOR] = reg[REG_CPSR];
                       reg[REG_PC] = 0x00000008;
diff --git a/gba_memory.c b/gba_memory.c
index 0231bec..824d05f 100644
--- a/gba_memory.c
+++ b/gba_memory.c
@@ -1428,6 +1428,12 @@ cpu_alert_type function_cc write_io_register32(u32 address, u32 value)
 }
 
 #define write_palette8(address, value)                                        \
+{                                                                             \
+  u32 aladdr = address & ~1U;                                                 \
+  u16 val16 = (value << 8) | value;                                           \
+  address16(palette_ram, aladdr) = eswap16(val16);                            \
+  address16(palette_ram_converted, aladdr) = convert_palette(val16);          \
+}
 
 #define write_palette16(address, value)                                       \
 {                                                                             \
@@ -1891,8 +1897,10 @@ void function_cc write_rtc(u32 address, u32 value)
                                                                               \
     case 0x07:                                                                \
       /* OAM RAM */                                                           \
-      reg[OAM_UPDATED] = 1;                                                   \
-      address##type(oam_ram, address & 0x3FF) = eswap##type(value);           \
+      if (type != 8) {                                                        \
+        reg[OAM_UPDATED] = 1;                                                 \
+        address##type(oam_ram, address & 0x3FF) = eswap##type(value);         \
+      }                                                                       \
       break;                                                                  \
                                                                               \
     case 0x08:                                                                \
diff --git a/x86/x86_emit.h b/x86/x86_emit.h
index c19e093..a8e41b6 100644
--- a/x86/x86_emit.h
+++ b/x86/x86_emit.h
@@ -1419,7 +1419,7 @@ void function_cc execute_store_spsr(u32 new_spsr, u32 store_mask)
   if(((address & aligned_address_mask##size) == 0) &&                         \
    (map = memory_map_read[address >> 15]))                                    \
   {                                                                           \
-    dest = *((type *)((u8 *)map + (address & 0x7FFF)));                       \
+    dest = (type)readaddress##size(map, (address & 0x7FFF));                  \
   }                                                                           \
   else                                                                        \
   {                                                                           \
@@ -1449,18 +1449,18 @@ void function_cc execute_store_spsr(u32 new_spsr, u32 store_mask)
   }                                                                           \
 }                                                                             \
 
-#define access_memory_generate_read_function(mem_size, mem_type)              \
-u32 function_cc execute_load_##mem_type(u32 address)                          \
+#define access_memory_generate_read_function(mem_size, name, mem_type)        \
+u32 function_cc execute_load_##name(u32 address)                              \
 {                                                                             \
   u32 dest;                                                                   \
   read_memory(mem_size, mem_type, address, dest);                             \
   return dest;                                                                \
 }                                                                             \
 
-access_memory_generate_read_function(8, u8);
-access_memory_generate_read_function(8, s8);
-access_memory_generate_read_function(16, u16);
-access_memory_generate_read_function(32, u32);
+access_memory_generate_read_function(8, u8, u8);
+access_memory_generate_read_function(8, s8, s8);
+access_memory_generate_read_function(16, u16, u32);
+access_memory_generate_read_function(32, u32, u32);
 
 u32 function_cc execute_load_s16(u32 address)
 {
@@ -2175,6 +2175,8 @@ u32 function_cc execute_aligned_load32(u32 address)
 
 static void function_cc execute_swi(u32 pc)
 {
+  // Open bus value after SWI
+  bios_read_protect = 0xe3a02004;
   reg_mode[MODE_SUPERVISOR][6] = pc;
   spsr[MODE_SUPERVISOR] = reg[REG_CPSR];
   reg[REG_CPSR] = (reg[REG_CPSR] & ~0x3F) | 0x13;