From 7aaa280b9f41ad4e5d29f6471a0a814888b12485 Mon Sep 17 00:00:00 2001 From: David Guillen Fandos Date: Wed, 10 Feb 2021 02:46:45 +0100 Subject: [PATCH 1/2] Fix ARM dynarec Turns out there were a couple of very interesting and hard to track bugs. A missing comma made the reg list too short, leaving the 31th element at the mercy of the linker ordering algorithm, which seems to work in some cases depending on the compiler version. Also the cache flush code seemed not to work on my machine (OGA), not sure why it wored in the past :/ --- arm/arm_emit.h | 4 ++-- cpu_threaded.c | 10 ++-------- 2 files changed, 4 insertions(+), 10 deletions(-) diff --git a/arm/arm_emit.h b/arm/arm_emit.h index eb48aa2..e29755e 100644 --- a/arm/arm_emit.h +++ b/arm/arm_emit.h @@ -174,7 +174,7 @@ s32 arm_register_allocation[] = reg_x4, /* GBA r12 */ mem_reg, /* GBA r13 */ reg_x5, /* GBA r14 */ - reg_a0 /* GBA r15 */ + mem_reg, /* GBA r15 */ mem_reg, mem_reg, @@ -211,7 +211,7 @@ s32 thumb_register_allocation[] = mem_reg, /* GBA r12 */ mem_reg, /* GBA r13 */ mem_reg, /* GBA r14 */ - reg_a0 /* GBA r15 */ + mem_reg, /* GBA r15 */ mem_reg, mem_reg, diff --git a/cpu_threaded.c b/cpu_threaded.c index 16a4852..ef7d83b 100644 --- a/cpu_threaded.c +++ b/cpu_threaded.c @@ -272,17 +272,11 @@ extern u8 bit_count[256]; #define invalidate_icache_region(addr, size) (void)0 #elif defined(ARM_ARCH) -static int sys_cacheflush(void *addr, unsigned long size) +static void sys_cacheflush(void *addr, unsigned long size) { void *start = (void*)addr; void *end = (void*)(char *)addr + size; - - register const unsigned char *r0 asm("r0") = start; - register const unsigned char *r1 asm("r1") = end; - register const int r2 asm("r2") = 0; - register const int r7 asm("r7") = 0xf0002; - asm volatile ("svc 0x0" :: "r" (r0), "r" (r1), "r" (r2), "r" (r7)); - return -1; + __clear_cache(start, end); } #define translate_invalidate_dcache_one(which) \ From 2c6026cfe5cb89b9041ee40230bfef754c21c83d Mon Sep 17 00:00:00 2001 From: David Guillen Fandos Date: Wed, 10 Feb 2021 02:53:26 +0100 Subject: [PATCH 2/2] Move r15 to reg_a0 (instead of reg_mem) I think this does not make a difference at all in the code, since PC is treated in a special way anyway (reloaded with an immediate when read and treated as an indirect branch when written). However for the sake of completeness I'm undoing what I did. (The comma fix stays :P) --- arm/arm_emit.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arm/arm_emit.h b/arm/arm_emit.h index e29755e..51987a3 100644 --- a/arm/arm_emit.h +++ b/arm/arm_emit.h @@ -174,7 +174,7 @@ s32 arm_register_allocation[] = reg_x4, /* GBA r12 */ mem_reg, /* GBA r13 */ reg_x5, /* GBA r14 */ - mem_reg, /* GBA r15 */ + reg_a0, /* GBA r15 */ mem_reg, mem_reg, @@ -211,7 +211,7 @@ s32 thumb_register_allocation[] = mem_reg, /* GBA r12 */ mem_reg, /* GBA r13 */ mem_reg, /* GBA r14 */ - mem_reg, /* GBA r15 */ + reg_a0, /* GBA r15 */ mem_reg, mem_reg,